include/dt-bindings/clock/sun55i-a523-ccu.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/sun55i-a523-ccu.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/sun55i-a523-ccu.h
Extension
.h
Size
4968 bytes
Lines
191
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_SUN55I_A523_CCU_H_
#define _DT_BINDINGS_CLK_SUN55I_A523_CCU_H_

#define CLK_PLL_DDR0		0
#define CLK_PLL_PERIPH0_4X	1
#define CLK_PLL_PERIPH0_2X	2
#define CLK_PLL_PERIPH0_800M	3
#define CLK_PLL_PERIPH0_480M	4
#define CLK_PLL_PERIPH0_600M	5
#define CLK_PLL_PERIPH0_400M	6
#define CLK_PLL_PERIPH0_300M	7
#define CLK_PLL_PERIPH0_200M	8
#define CLK_PLL_PERIPH0_160M	9
#define CLK_PLL_PERIPH0_150M	10
#define CLK_PLL_PERIPH1_4X	11
#define CLK_PLL_PERIPH1_2X	12
#define CLK_PLL_PERIPH1_800M	13
#define CLK_PLL_PERIPH1_480M	14
#define CLK_PLL_PERIPH1_600M	15
#define CLK_PLL_PERIPH1_400M	16
#define CLK_PLL_PERIPH1_300M	17
#define CLK_PLL_PERIPH1_200M	18
#define CLK_PLL_PERIPH1_160M	19
#define CLK_PLL_PERIPH1_150M	20
#define CLK_PLL_GPU		21
#define CLK_PLL_VIDEO0_8X	22
#define CLK_PLL_VIDEO0_4X	23
#define CLK_PLL_VIDEO0_3X	24
#define CLK_PLL_VIDEO1_8X	25
#define CLK_PLL_VIDEO1_4X	26
#define CLK_PLL_VIDEO1_3X	27
#define CLK_PLL_VIDEO2_8X	28
#define CLK_PLL_VIDEO2_4X	29
#define CLK_PLL_VIDEO2_3X	30
#define CLK_PLL_VIDEO3_8X	31
#define CLK_PLL_VIDEO3_4X	32
#define CLK_PLL_VIDEO3_3X	33
#define CLK_PLL_VE		34
#define CLK_PLL_AUDIO0_4X	35
#define CLK_PLL_AUDIO0_2X	36
#define CLK_PLL_AUDIO0		37
#define CLK_PLL_NPU_4X		38
#define CLK_PLL_NPU_2X		39
#define CLK_PLL_NPU		40
#define CLK_AHB			41
#define CLK_APB0		42
#define CLK_APB1		43
#define CLK_MBUS		44
#define CLK_DE			45
#define CLK_BUS_DE		46
#define CLK_DI			47
#define CLK_BUS_DI		48
#define CLK_G2D			49
#define CLK_BUS_G2D		50
#define CLK_GPU			51
#define CLK_BUS_GPU		52
#define CLK_CE			53
#define CLK_BUS_CE		54
#define CLK_BUS_CE_SYS		55
#define CLK_VE			56
#define CLK_BUS_VE		57
#define CLK_BUS_DMA		58
#define CLK_BUS_MSGBOX		59
#define CLK_BUS_SPINLOCK	60
#define CLK_HSTIMER0		61
#define CLK_HSTIMER1		62
#define CLK_HSTIMER2		63
#define CLK_HSTIMER3		64
#define CLK_HSTIMER4		65
#define CLK_HSTIMER5		66
#define CLK_BUS_HSTIMER		67
#define CLK_BUS_DBG		68
#define CLK_BUS_PWM0		69
#define CLK_BUS_PWM1		70
#define CLK_IOMMU		71
#define CLK_BUS_IOMMU		72
#define CLK_DRAM		73
#define CLK_MBUS_DMA		74
#define CLK_MBUS_VE		75
#define CLK_MBUS_CE		76
#define CLK_MBUS_CSI		77
#define CLK_MBUS_ISP		78
#define CLK_MBUS_EMAC1		79
#define CLK_BUS_DRAM		80
#define CLK_NAND0		81
#define CLK_NAND1		82
#define CLK_BUS_NAND		83
#define CLK_MMC0		84
#define CLK_MMC1		85
#define CLK_MMC2		86

Annotation

Implementation Notes