include/dt-bindings/clock/suniv-ccu-f1c100s.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/suniv-ccu-f1c100s.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/suniv-ccu-f1c100s.h- Extension
.h- Size
- 1558 bytes
- Lines
- 73
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_SUNIV_F1C100S_H_
#define _DT_BINDINGS_CLK_SUNIV_F1C100S_H_
#define CLK_CPU 11
#define CLK_BUS_DMA 14
#define CLK_BUS_MMC0 15
#define CLK_BUS_MMC1 16
#define CLK_BUS_DRAM 17
#define CLK_BUS_SPI0 18
#define CLK_BUS_SPI1 19
#define CLK_BUS_OTG 20
#define CLK_BUS_VE 21
#define CLK_BUS_LCD 22
#define CLK_BUS_DEINTERLACE 23
#define CLK_BUS_CSI 24
#define CLK_BUS_TVD 25
#define CLK_BUS_TVE 26
#define CLK_BUS_DE_BE 27
#define CLK_BUS_DE_FE 28
#define CLK_BUS_CODEC 29
#define CLK_BUS_SPDIF 30
#define CLK_BUS_IR 31
#define CLK_BUS_RSB 32
#define CLK_BUS_I2S0 33
#define CLK_BUS_I2C0 34
#define CLK_BUS_I2C1 35
#define CLK_BUS_I2C2 36
#define CLK_BUS_PIO 37
#define CLK_BUS_UART0 38
#define CLK_BUS_UART1 39
#define CLK_BUS_UART2 40
#define CLK_MMC0 41
#define CLK_MMC0_SAMPLE 42
#define CLK_MMC0_OUTPUT 43
#define CLK_MMC1 44
#define CLK_MMC1_SAMPLE 45
#define CLK_MMC1_OUTPUT 46
#define CLK_I2S 47
#define CLK_SPDIF 48
#define CLK_USB_PHY0 49
#define CLK_DRAM_VE 50
#define CLK_DRAM_CSI 51
#define CLK_DRAM_DEINTERLACE 52
#define CLK_DRAM_TVD 53
#define CLK_DRAM_DE_FE 54
#define CLK_DRAM_DE_BE 55
#define CLK_DE_BE 56
#define CLK_DE_FE 57
#define CLK_TCON 58
#define CLK_DEINTERLACE 59
#define CLK_TVE2_CLK 60
#define CLK_TVE1_CLK 61
#define CLK_TVD 62
#define CLK_CSI 63
#define CLK_VE 64
#define CLK_CODEC 65
#define CLK_AVS 66
#define CLK_IR 67
#endif
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.