include/dt-bindings/clock/tegra194-clock.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/tegra194-clock.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/tegra194-clock.h
Extension
.h
Size
11456 bytes
Lines
322
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __ABI_MACH_T194_CLOCK_H
#define __ABI_MACH_T194_CLOCK_H

#define TEGRA194_CLK_ACTMON			1
#define TEGRA194_CLK_ADSP			2
#define TEGRA194_CLK_ADSPNEON			3
#define TEGRA194_CLK_AHUB			4
#define TEGRA194_CLK_APB2APE			5
#define TEGRA194_CLK_APE			6
#define TEGRA194_CLK_AUD_MCLK			7
#define TEGRA194_CLK_AXI_CBB			8
#define TEGRA194_CLK_CAN1			9
#define TEGRA194_CLK_CAN1_HOST			10
#define TEGRA194_CLK_CAN2			11
#define TEGRA194_CLK_CAN2_HOST			12
#define TEGRA194_CLK_CEC			13
#define TEGRA194_CLK_CLK_M			14
#define TEGRA194_CLK_DMIC1			15
#define TEGRA194_CLK_DMIC2			16
#define TEGRA194_CLK_DMIC3			17
#define TEGRA194_CLK_DMIC4			18
#define TEGRA194_CLK_DPAUX			19
#define TEGRA194_CLK_DPAUX1			20
#define TEGRA194_CLK_ACLK			21
#define TEGRA194_CLK_MSS_ENCRYPT		22
#define TEGRA194_CLK_EQOS_RX_INPUT		23
#define TEGRA194_CLK_IQC2			24
#define TEGRA194_CLK_AON_APB			25
#define TEGRA194_CLK_AON_NIC			26
#define TEGRA194_CLK_AON_CPU_NIC		27
#define TEGRA194_CLK_PLLA1			28
#define TEGRA194_CLK_DSPK1			29
#define TEGRA194_CLK_DSPK2			30
#define TEGRA194_CLK_EMC			31
#define TEGRA194_CLK_EQOS_AXI			32
#define TEGRA194_CLK_EQOS_PTP_REF		33
#define TEGRA194_CLK_EQOS_RX			34
#define TEGRA194_CLK_EQOS_TX			35
#define TEGRA194_CLK_EXTPERIPH1			36
#define TEGRA194_CLK_EXTPERIPH2			37
#define TEGRA194_CLK_EXTPERIPH3			38
#define TEGRA194_CLK_EXTPERIPH4			39
#define TEGRA194_CLK_FUSE			40
#define TEGRA194_CLK_GPCCLK			41
#define TEGRA194_CLK_GPU_PWR			42
#define TEGRA194_CLK_HDA			43
#define TEGRA194_CLK_HDA2CODEC_2X		44
#define TEGRA194_CLK_HDA2HDMICODEC		45
#define TEGRA194_CLK_HOST1X			46
#define TEGRA194_CLK_HSIC_TRK			47
#define TEGRA194_CLK_I2C1			48
#define TEGRA194_CLK_I2C2			49
#define TEGRA194_CLK_I2C3			50
#define TEGRA194_CLK_I2C4			51
#define TEGRA194_CLK_I2C6			52
#define TEGRA194_CLK_I2C7			53
#define TEGRA194_CLK_I2C8			54
#define TEGRA194_CLK_I2C9			55
#define TEGRA194_CLK_I2S1			56
#define TEGRA194_CLK_I2S1_SYNC_INPUT		57
#define TEGRA194_CLK_I2S2			58
#define TEGRA194_CLK_I2S2_SYNC_INPUT		59
#define TEGRA194_CLK_I2S3			60
#define TEGRA194_CLK_I2S3_SYNC_INPUT		61
#define TEGRA194_CLK_I2S4			62
#define TEGRA194_CLK_I2S4_SYNC_INPUT		63
#define TEGRA194_CLK_I2S5			64
#define TEGRA194_CLK_I2S5_SYNC_INPUT		65
#define TEGRA194_CLK_I2S6			66
#define TEGRA194_CLK_I2S6_SYNC_INPUT		67
#define TEGRA194_CLK_IQC1			68
#define TEGRA194_CLK_ISP			69
#define TEGRA194_CLK_KFUSE			70
#define TEGRA194_CLK_MAUD			71
#define TEGRA194_CLK_MIPI_CAL			72
#define TEGRA194_CLK_MPHY_CORE_PLL_FIXED	73
#define TEGRA194_CLK_MPHY_L0_RX_ANA		74
#define TEGRA194_CLK_MPHY_L0_RX_LS_BIT		75
#define TEGRA194_CLK_MPHY_L0_RX_SYMB		76
#define TEGRA194_CLK_MPHY_L0_TX_LS_3XBIT	77
#define TEGRA194_CLK_MPHY_L0_TX_SYMB		78
#define TEGRA194_CLK_MPHY_L1_RX_ANA		79
#define TEGRA194_CLK_MPHY_TX_1MHZ_REF		80
#define TEGRA194_CLK_NVCSI			81
#define TEGRA194_CLK_NVCSILP			82
#define TEGRA194_CLK_NVDEC			83
#define TEGRA194_CLK_NVDISPLAYHUB		84
#define TEGRA194_CLK_NVDISPLAY_DISP		85
#define TEGRA194_CLK_NVDISPLAY_P0		86
#define TEGRA194_CLK_NVDISPLAY_P1		87

Annotation

Implementation Notes