include/dt-bindings/firmware/imx/rsrc.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/firmware/imx/rsrc.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/firmware/imx/rsrc.h- Extension
.h- Size
- 25109 bytes
- Lines
- 753
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DT_BINDINGS_RSCRC_IMX_H
#define __DT_BINDINGS_RSCRC_IMX_H
/*
* These defines are used to indicate a resource. Resources include peripherals
* and bus masters (but not memory regions). Note items from list should
* never be changed or removed (only added to at the end of the list).
*/
#define IMX_SC_R_AP_0 0
#define IMX_SC_R_AP_0_0 1
#define IMX_SC_R_AP_0_1 2
#define IMX_SC_R_AP_0_2 3
#define IMX_SC_R_AP_0_3 4
#define IMX_SC_R_AP_1 5
#define IMX_SC_R_AP_1_0 6
#define IMX_SC_R_AP_1_1 7
#define IMX_SC_R_AP_1_2 8
#define IMX_SC_R_AP_1_3 9
#define IMX_SC_R_CCI 10
#define IMX_SC_R_DB 11
#define IMX_SC_R_DRC_0 12
#define IMX_SC_R_DRC_1 13
#define IMX_SC_R_GIC_SMMU 14
#define IMX_SC_R_IRQSTR_MCU_0 15
#define IMX_SC_R_IRQSTR_MCU_1 16
#define IMX_SC_R_SMMU_0 17
#define IMX_SC_R_GIC_0 18
#define IMX_SC_R_DC_0_BLIT0 19
#define IMX_SC_R_DC_0_BLIT1 20
#define IMX_SC_R_DC_0_BLIT2 21
#define IMX_SC_R_DC_0_BLIT_OUT 22
#define IMX_SC_R_PERF_0 23
#define IMX_SC_R_USB_1_PHY 24
#define IMX_SC_R_DC_0_WARP 25
#define IMX_SC_R_V2X_MU_0 26
#define IMX_SC_R_V2X_MU_1 27
#define IMX_SC_R_DC_0_VIDEO0 28
#define IMX_SC_R_DC_0_VIDEO1 29
#define IMX_SC_R_DC_0_FRAC0 30
#define IMX_SC_R_V2X_MU_2 31
#define IMX_SC_R_DC_0 32
#define IMX_SC_R_GPU_2_PID0 33
#define IMX_SC_R_DC_0_PLL_0 34
#define IMX_SC_R_DC_0_PLL_1 35
#define IMX_SC_R_DC_1_BLIT0 36
#define IMX_SC_R_DC_1_BLIT1 37
#define IMX_SC_R_DC_1_BLIT2 38
#define IMX_SC_R_DC_1_BLIT_OUT 39
#define IMX_SC_R_V2X_MU_3 40
#define IMX_SC_R_V2X_MU_4 41
#define IMX_SC_R_DC_1_WARP 42
#define IMX_SC_R_STM 43
#define IMX_SC_R_SECVIO 44
#define IMX_SC_R_DC_1_VIDEO0 45
#define IMX_SC_R_DC_1_VIDEO1 46
#define IMX_SC_R_DC_1_FRAC0 47
#define IMX_SC_R_V2X 48
#define IMX_SC_R_DC_1 49
#define IMX_SC_R_UNUSED14 50
#define IMX_SC_R_DC_1_PLL_0 51
#define IMX_SC_R_DC_1_PLL_1 52
#define IMX_SC_R_SPI_0 53
#define IMX_SC_R_SPI_1 54
#define IMX_SC_R_SPI_2 55
#define IMX_SC_R_SPI_3 56
#define IMX_SC_R_UART_0 57
#define IMX_SC_R_UART_1 58
#define IMX_SC_R_UART_2 59
#define IMX_SC_R_UART_3 60
#define IMX_SC_R_UART_4 61
#define IMX_SC_R_EMVSIM_0 62
#define IMX_SC_R_EMVSIM_1 63
#define IMX_SC_R_DMA_0_CH0 64
#define IMX_SC_R_DMA_0_CH1 65
#define IMX_SC_R_DMA_0_CH2 66
#define IMX_SC_R_DMA_0_CH3 67
#define IMX_SC_R_DMA_0_CH4 68
#define IMX_SC_R_DMA_0_CH5 69
#define IMX_SC_R_DMA_0_CH6 70
#define IMX_SC_R_DMA_0_CH7 71
#define IMX_SC_R_DMA_0_CH8 72
#define IMX_SC_R_DMA_0_CH9 73
#define IMX_SC_R_DMA_0_CH10 74
#define IMX_SC_R_DMA_0_CH11 75
#define IMX_SC_R_DMA_0_CH12 76
#define IMX_SC_R_DMA_0_CH13 77
#define IMX_SC_R_DMA_0_CH14 78
#define IMX_SC_R_DMA_0_CH15 79
#define IMX_SC_R_DMA_0_CH16 80
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.