include/dt-bindings/interconnect/qcom,sc8180x.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/interconnect/qcom,sc8180x.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/interconnect/qcom,sc8180x.h- Extension
.h- Size
- 5193 bytes
- Lines
- 190
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC8180X_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SC8180X_H
#define MASTER_A1NOC_CFG 0
#define MASTER_UFS_CARD 1
#define MASTER_UFS_GEN4 2
#define MASTER_UFS_MEM 3
#define MASTER_USB3 4
#define MASTER_USB3_1 5
#define MASTER_USB3_2 6
#define A1NOC_SNOC_SLV 7
#define SLAVE_SERVICE_A1NOC 8
#define MASTER_A2NOC_CFG 0
#define MASTER_QDSS_BAM 1
#define MASTER_QSPI_0 2
#define MASTER_QSPI_1 3
#define MASTER_QUP_0 4
#define MASTER_QUP_1 5
#define MASTER_QUP_2 6
#define MASTER_SENSORS_AHB 7
#define MASTER_CRYPTO_CORE_0 8
#define MASTER_IPA 9
#define MASTER_EMAC 10
#define MASTER_PCIE 11
#define MASTER_PCIE_1 12
#define MASTER_PCIE_2 13
#define MASTER_PCIE_3 14
#define MASTER_QDSS_ETR 15
#define MASTER_SDCC_2 16
#define MASTER_SDCC_4 17
#define A2NOC_SNOC_SLV 18
#define SLAVE_ANOC_PCIE_GEM_NOC 19
#define SLAVE_SERVICE_A2NOC 20
#define MASTER_CAMNOC_HF0_UNCOMP 0
#define MASTER_CAMNOC_HF1_UNCOMP 1
#define MASTER_CAMNOC_SF_UNCOMP 2
#define SLAVE_CAMNOC_UNCOMP 3
#define MASTER_NPU 0
#define SLAVE_CDSP_MEM_NOC 1
#define SNOC_CNOC_MAS 0
#define SLAVE_A1NOC_CFG 1
#define SLAVE_A2NOC_CFG 2
#define SLAVE_AHB2PHY_CENTER 3
#define SLAVE_AHB2PHY_EAST 4
#define SLAVE_AHB2PHY_WEST 5
#define SLAVE_AHB2PHY_SOUTH 6
#define SLAVE_AOP 7
#define SLAVE_AOSS 8
#define SLAVE_CAMERA_CFG 9
#define SLAVE_CLK_CTL 10
#define SLAVE_CDSP_CFG 11
#define SLAVE_RBCPR_CX_CFG 12
#define SLAVE_RBCPR_MMCX_CFG 13
#define SLAVE_RBCPR_MX_CFG 14
#define SLAVE_CRYPTO_0_CFG 15
#define SLAVE_CNOC_DDRSS 16
#define SLAVE_DISPLAY_CFG 17
#define SLAVE_EMAC_CFG 18
#define SLAVE_GLM 19
#define SLAVE_GRAPHICS_3D_CFG 20
#define SLAVE_IMEM_CFG 21
#define SLAVE_IPA_CFG 22
#define SLAVE_CNOC_MNOC_CFG 23
#define SLAVE_NPU_CFG 24
#define SLAVE_PCIE_0_CFG 25
#define SLAVE_PCIE_1_CFG 26
#define SLAVE_PCIE_2_CFG 27
#define SLAVE_PCIE_3_CFG 28
#define SLAVE_PDM 29
#define SLAVE_PIMEM_CFG 30
#define SLAVE_PRNG 31
#define SLAVE_QDSS_CFG 32
#define SLAVE_QSPI_0 33
#define SLAVE_QSPI_1 34
#define SLAVE_QUP_1 35
#define SLAVE_QUP_2 36
#define SLAVE_QUP_0 37
#define SLAVE_SDCC_2 38
#define SLAVE_SDCC_4 39
#define SLAVE_SECURITY 40
#define SLAVE_SNOC_CFG 41
#define SLAVE_SPSS_CFG 42
#define SLAVE_TCSR 43
#define SLAVE_TLMM_EAST 44
#define SLAVE_TLMM_SOUTH 45
#define SLAVE_TLMM_WEST 46
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.