include/dt-bindings/interconnect/qcom,sc8280xp.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/interconnect/qcom,sc8280xp.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/interconnect/qcom,sc8280xp.h
Extension
.h
Size
6264 bytes
Lines
233
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC8280XP_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SC8280XP_H

/* aggre1_noc */
#define MASTER_QSPI_0			0
#define MASTER_QUP_1			1
#define MASTER_QUP_2			2
#define MASTER_A1NOC_CFG		3
#define MASTER_IPA			4
#define MASTER_EMAC_1			5
#define MASTER_SDCC_4			6
#define MASTER_UFS_MEM			7
#define MASTER_USB3_0			8
#define MASTER_USB3_1			9
#define MASTER_USB3_MP			10
#define MASTER_USB4_0			11
#define MASTER_USB4_1			12
#define SLAVE_A1NOC_SNOC		13
#define SLAVE_USB_NOC_SNOC		14
#define SLAVE_SERVICE_A1NOC		15

/* aggre2_noc */
#define MASTER_QDSS_BAM			0
#define MASTER_QUP_0			1
#define MASTER_A2NOC_CFG		2
#define MASTER_CRYPTO			3
#define MASTER_SENSORS_PROC		4
#define MASTER_SP			5
#define MASTER_EMAC			6
#define MASTER_PCIE_0			7
#define MASTER_PCIE_1			8
#define MASTER_PCIE_2A			9
#define MASTER_PCIE_2B			10
#define MASTER_PCIE_3A			11
#define MASTER_PCIE_3B			12
#define MASTER_PCIE_4			13
#define MASTER_QDSS_ETR			14
#define MASTER_SDCC_2			15
#define MASTER_UFS_CARD			16
#define SLAVE_A2NOC_SNOC		17
#define SLAVE_ANOC_PCIE_GEM_NOC		18
#define SLAVE_SERVICE_A2NOC		19

/* clk_virt */
/* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */
#define MASTER_QUP_CORE_0		1
#define MASTER_QUP_CORE_1		2
#define MASTER_QUP_CORE_2		3
/* 4 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
#define SLAVE_QUP_CORE_0		5
#define SLAVE_QUP_CORE_1		6
#define SLAVE_QUP_CORE_2		7

/* config_noc */
#define MASTER_GEM_NOC_CNOC		0
#define MASTER_GEM_NOC_PCIE_SNOC	1
#define SLAVE_AHB2PHY_0			2
#define SLAVE_AHB2PHY_1			3
#define SLAVE_AHB2PHY_2			4
#define SLAVE_AOSS			5
#define SLAVE_APPSS			6
#define SLAVE_CAMERA_CFG		7
#define SLAVE_CLK_CTL			8
#define SLAVE_CDSP_CFG			9
#define SLAVE_CDSP1_CFG			10
#define SLAVE_RBCPR_CX_CFG		11
#define SLAVE_RBCPR_MMCX_CFG		12
#define SLAVE_RBCPR_MX_CFG		13
#define SLAVE_CPR_NSPCX			14
#define SLAVE_CRYPTO_0_CFG		15
#define SLAVE_CX_RDPM			16
#define SLAVE_DCC_CFG			17
#define SLAVE_DISPLAY_CFG		18
#define SLAVE_DISPLAY1_CFG		19
#define SLAVE_EMAC_CFG			20
#define SLAVE_EMAC1_CFG			21
#define SLAVE_GFX3D_CFG			22
#define SLAVE_HWKM			23
#define SLAVE_IMEM_CFG			24
#define SLAVE_IPA_CFG			25
#define SLAVE_IPC_ROUTER_CFG		26
#define SLAVE_LPASS			27
#define SLAVE_MX_RDPM			28
#define SLAVE_MXC_RDPM			29
#define SLAVE_PCIE_0_CFG		30
#define SLAVE_PCIE_1_CFG		31
#define SLAVE_PCIE_2A_CFG		32
#define SLAVE_PCIE_2B_CFG		33
#define SLAVE_PCIE_3A_CFG		34
#define SLAVE_PCIE_3B_CFG		35

Annotation

Implementation Notes