include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h- Extension
.h- Size
- 4804 bytes
- Lines
- 184
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_X1E80100_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_X1E80100_H
#define MASTER_QSPI_0 0
#define MASTER_QUP_1 1
#define MASTER_SDCC_4 2
#define MASTER_UFS_MEM 3
#define SLAVE_A1NOC_SNOC 4
#define MASTER_QUP_0 0
#define MASTER_QUP_2 1
#define MASTER_CRYPTO 2
#define MASTER_SP 3
#define MASTER_QDSS_ETR 4
#define MASTER_QDSS_ETR_1 5
#define MASTER_SDCC_2 6
#define SLAVE_A2NOC_SNOC 7
#define MASTER_DDR_PERF_MODE 0
#define MASTER_QUP_CORE_0 1
#define MASTER_QUP_CORE_1 2
#define MASTER_QUP_CORE_2 3
#define SLAVE_DDR_PERF_MODE 4
#define SLAVE_QUP_CORE_0 5
#define SLAVE_QUP_CORE_1 6
#define SLAVE_QUP_CORE_2 7
#define MASTER_CNOC_CFG 0
#define SLAVE_AHB2PHY_SOUTH 1
#define SLAVE_AHB2PHY_NORTH 2
#define SLAVE_AHB2PHY_2 3
#define SLAVE_AV1_ENC_CFG 4
#define SLAVE_CAMERA_CFG 5
#define SLAVE_CLK_CTL 6
#define SLAVE_CRYPTO_0_CFG 7
#define SLAVE_DISPLAY_CFG 8
#define SLAVE_GFX3D_CFG 9
#define SLAVE_IMEM_CFG 10
#define SLAVE_IPC_ROUTER_CFG 11
#define SLAVE_PCIE_0_CFG 12
#define SLAVE_PCIE_1_CFG 13
#define SLAVE_PCIE_2_CFG 14
#define SLAVE_PCIE_3_CFG 15
#define SLAVE_PCIE_4_CFG 16
#define SLAVE_PCIE_5_CFG 17
#define SLAVE_PCIE_6A_CFG 18
#define SLAVE_PCIE_6B_CFG 19
#define SLAVE_PCIE_RSC_CFG 20
#define SLAVE_PDM 21
#define SLAVE_PRNG 22
#define SLAVE_QDSS_CFG 23
#define SLAVE_QSPI_0 24
#define SLAVE_QUP_0 25
#define SLAVE_QUP_1 26
#define SLAVE_QUP_2 27
#define SLAVE_SDCC_2 28
#define SLAVE_SDCC_4 29
#define SLAVE_SMMUV3_CFG 30
#define SLAVE_TCSR 31
#define SLAVE_TLMM 32
#define SLAVE_UFS_MEM_CFG 33
#define SLAVE_USB2 34
#define SLAVE_USB3_0 35
#define SLAVE_USB3_1 36
#define SLAVE_USB3_2 37
#define SLAVE_USB3_MP 38
#define SLAVE_USB4_0 39
#define SLAVE_USB4_1 40
#define SLAVE_USB4_2 41
#define SLAVE_VENUS_CFG 42
#define SLAVE_LPASS_QTB_CFG 43
#define SLAVE_CNOC_MNOC_CFG 44
#define SLAVE_NSP_QTB_CFG 45
#define SLAVE_QDSS_STM 46
#define SLAVE_TCU 47
#define MASTER_GEM_NOC_CNOC 0
#define MASTER_GEM_NOC_PCIE_SNOC 1
#define SLAVE_AOSS 2
#define SLAVE_TME_CFG 3
#define SLAVE_APPSS 4
#define SLAVE_CNOC_CFG 5
#define SLAVE_BOOT_IMEM 6
#define SLAVE_IMEM 7
#define SLAVE_PCIE_0 8
#define SLAVE_PCIE_1 9
#define SLAVE_PCIE_2 10
#define SLAVE_PCIE_3 11
#define SLAVE_PCIE_4 12
#define SLAVE_PCIE_5 13
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.