include/dt-bindings/memory/tegra194-mc.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/memory/tegra194-mc.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/memory/tegra194-mc.h- Extension
.h- Size
- 14215 bytes
- Lines
- 411
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef DT_BINDINGS_MEMORY_TEGRA194_MC_H
#define DT_BINDINGS_MEMORY_TEGRA194_MC_H
/* special clients */
#define TEGRA194_SID_INVALID 0x00
#define TEGRA194_SID_PASSTHROUGH 0x7f
/* host1x clients */
#define TEGRA194_SID_HOST1X 0x01
#define TEGRA194_SID_CSI 0x02
#define TEGRA194_SID_VIC 0x03
#define TEGRA194_SID_VI 0x04
#define TEGRA194_SID_ISP 0x05
#define TEGRA194_SID_NVDEC 0x06
#define TEGRA194_SID_NVENC 0x07
#define TEGRA194_SID_NVJPG 0x08
#define TEGRA194_SID_NVDISPLAY 0x09
#define TEGRA194_SID_TSEC 0x0a
#define TEGRA194_SID_TSECB 0x0b
#define TEGRA194_SID_SE 0x0c
#define TEGRA194_SID_SE1 0x0d
#define TEGRA194_SID_SE2 0x0e
#define TEGRA194_SID_SE3 0x0f
/* GPU clients */
#define TEGRA194_SID_GPU 0x10
/* other SoC clients */
#define TEGRA194_SID_AFI 0x11
#define TEGRA194_SID_HDA 0x12
#define TEGRA194_SID_ETR 0x13
#define TEGRA194_SID_EQOS 0x14
#define TEGRA194_SID_UFSHC 0x15
#define TEGRA194_SID_AON 0x16
#define TEGRA194_SID_SDMMC4 0x17
#define TEGRA194_SID_SDMMC3 0x18
#define TEGRA194_SID_SDMMC2 0x19
#define TEGRA194_SID_SDMMC1 0x1a
#define TEGRA194_SID_XUSB_HOST 0x1b
#define TEGRA194_SID_XUSB_DEV 0x1c
#define TEGRA194_SID_SATA 0x1d
#define TEGRA194_SID_APE 0x1e
#define TEGRA194_SID_SCE 0x1f
/* GPC DMA clients */
#define TEGRA194_SID_GPCDMA_0 0x20
#define TEGRA194_SID_GPCDMA_1 0x21
#define TEGRA194_SID_GPCDMA_2 0x22
#define TEGRA194_SID_GPCDMA_3 0x23
#define TEGRA194_SID_GPCDMA_4 0x24
#define TEGRA194_SID_GPCDMA_5 0x25
#define TEGRA194_SID_GPCDMA_6 0x26
#define TEGRA194_SID_GPCDMA_7 0x27
/* APE DMA clients */
#define TEGRA194_SID_APE_1 0x28
#define TEGRA194_SID_APE_2 0x29
/* camera RTCPU */
#define TEGRA194_SID_RCE 0x2a
/* camera RTCPU on host1x address space */
#define TEGRA194_SID_RCE_1X 0x2b
/* APE DMA clients */
#define TEGRA194_SID_APE_3 0x2c
/* camera RTCPU running on APE */
#define TEGRA194_SID_APE_CAM 0x2d
#define TEGRA194_SID_APE_CAM_1X 0x2e
#define TEGRA194_SID_RCE_RM 0x2f
#define TEGRA194_SID_VI_FALCON 0x30
#define TEGRA194_SID_ISP_FALCON 0x31
/*
* The BPMP has its SID value hardcoded in the firmware. Changing it requires
* considerable effort.
*/
#define TEGRA194_SID_BPMP 0x32
/* for SMMU tests */
#define TEGRA194_SID_SMMU_TEST 0x33
/* host1x virtualization channels */
#define TEGRA194_SID_HOST1X_CTX0 0x38
#define TEGRA194_SID_HOST1X_CTX1 0x39
#define TEGRA194_SID_HOST1X_CTX2 0x3a
#define TEGRA194_SID_HOST1X_CTX3 0x3b
#define TEGRA194_SID_HOST1X_CTX4 0x3c
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.