include/dt-bindings/pinctrl/keystone.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/pinctrl/keystone.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/pinctrl/keystone.h- Extension
.h- Size
- 764 bytes
- Lines
- 32
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_PINCTRL_KEYSTONE_H
#define _DT_BINDINGS_PINCTRL_KEYSTONE_H
#define MUX_MODE0 0
#define MUX_MODE1 1
#define MUX_MODE2 2
#define MUX_MODE3 3
#define MUX_MODE4 4
#define MUX_MODE5 5
#define BUFFER_CLASS_B (0 << 19)
#define BUFFER_CLASS_C (1 << 19)
#define BUFFER_CLASS_D (2 << 19)
#define BUFFER_CLASS_E (3 << 19)
#define PULL_DISABLE (1 << 16)
#define PIN_PULLUP (1 << 17)
#define PIN_PULLDOWN (0 << 17)
#define KEYSTONE_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
#define K2G_CORE_IOPAD(pa) KEYSTONE_IOPAD_OFFSET((pa), 0x1000)
#endif
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.