include/dt-bindings/pinctrl/lochnagar.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/pinctrl/lochnagar.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/pinctrl/lochnagar.h- Extension
.h- Size
- 4903 bytes
- Lines
- 133
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H
#define DT_BINDINGS_PINCTRL_LOCHNAGAR_H
#define LOCHNAGAR1_PIN_CDC_RESET 0
#define LOCHNAGAR1_PIN_DSP_RESET 1
#define LOCHNAGAR1_PIN_CDC_CIF1MODE 2
#define LOCHNAGAR1_PIN_NUM_GPIOS 3
#define LOCHNAGAR2_PIN_CDC_RESET 0
#define LOCHNAGAR2_PIN_DSP_RESET 1
#define LOCHNAGAR2_PIN_CDC_CIF1MODE 2
#define LOCHNAGAR2_PIN_CDC_LDOENA 3
#define LOCHNAGAR2_PIN_SPDIF_HWMODE 4
#define LOCHNAGAR2_PIN_SPDIF_RESET 5
#define LOCHNAGAR2_PIN_FPGA_GPIO1 6
#define LOCHNAGAR2_PIN_FPGA_GPIO2 7
#define LOCHNAGAR2_PIN_FPGA_GPIO3 8
#define LOCHNAGAR2_PIN_FPGA_GPIO4 9
#define LOCHNAGAR2_PIN_FPGA_GPIO5 10
#define LOCHNAGAR2_PIN_FPGA_GPIO6 11
#define LOCHNAGAR2_PIN_CDC_GPIO1 12
#define LOCHNAGAR2_PIN_CDC_GPIO2 13
#define LOCHNAGAR2_PIN_CDC_GPIO3 14
#define LOCHNAGAR2_PIN_CDC_GPIO4 15
#define LOCHNAGAR2_PIN_CDC_GPIO5 16
#define LOCHNAGAR2_PIN_CDC_GPIO6 17
#define LOCHNAGAR2_PIN_CDC_GPIO7 18
#define LOCHNAGAR2_PIN_CDC_GPIO8 19
#define LOCHNAGAR2_PIN_DSP_GPIO1 20
#define LOCHNAGAR2_PIN_DSP_GPIO2 21
#define LOCHNAGAR2_PIN_DSP_GPIO3 22
#define LOCHNAGAR2_PIN_DSP_GPIO4 23
#define LOCHNAGAR2_PIN_DSP_GPIO5 24
#define LOCHNAGAR2_PIN_DSP_GPIO6 25
#define LOCHNAGAR2_PIN_GF_GPIO2 26
#define LOCHNAGAR2_PIN_GF_GPIO3 27
#define LOCHNAGAR2_PIN_GF_GPIO7 28
#define LOCHNAGAR2_PIN_CDC_AIF1_BCLK 29
#define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT 30
#define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK 31
#define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT 32
#define LOCHNAGAR2_PIN_CDC_AIF2_BCLK 33
#define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT 34
#define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK 35
#define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT 36
#define LOCHNAGAR2_PIN_CDC_AIF3_BCLK 37
#define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT 38
#define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK 39
#define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT 40
#define LOCHNAGAR2_PIN_DSP_AIF1_BCLK 41
#define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT 42
#define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK 43
#define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT 44
#define LOCHNAGAR2_PIN_DSP_AIF2_BCLK 45
#define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT 46
#define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK 47
#define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT 48
#define LOCHNAGAR2_PIN_PSIA1_BCLK 49
#define LOCHNAGAR2_PIN_PSIA1_RXDAT 50
#define LOCHNAGAR2_PIN_PSIA1_LRCLK 51
#define LOCHNAGAR2_PIN_PSIA1_TXDAT 52
#define LOCHNAGAR2_PIN_PSIA2_BCLK 53
#define LOCHNAGAR2_PIN_PSIA2_RXDAT 54
#define LOCHNAGAR2_PIN_PSIA2_LRCLK 55
#define LOCHNAGAR2_PIN_PSIA2_TXDAT 56
#define LOCHNAGAR2_PIN_GF_AIF3_BCLK 57
#define LOCHNAGAR2_PIN_GF_AIF3_RXDAT 58
#define LOCHNAGAR2_PIN_GF_AIF3_LRCLK 59
#define LOCHNAGAR2_PIN_GF_AIF3_TXDAT 60
#define LOCHNAGAR2_PIN_GF_AIF4_BCLK 61
#define LOCHNAGAR2_PIN_GF_AIF4_RXDAT 62
#define LOCHNAGAR2_PIN_GF_AIF4_LRCLK 63
#define LOCHNAGAR2_PIN_GF_AIF4_TXDAT 64
#define LOCHNAGAR2_PIN_GF_AIF1_BCLK 65
#define LOCHNAGAR2_PIN_GF_AIF1_RXDAT 66
#define LOCHNAGAR2_PIN_GF_AIF1_LRCLK 67
#define LOCHNAGAR2_PIN_GF_AIF1_TXDAT 68
#define LOCHNAGAR2_PIN_GF_AIF2_BCLK 69
#define LOCHNAGAR2_PIN_GF_AIF2_RXDAT 70
#define LOCHNAGAR2_PIN_GF_AIF2_LRCLK 71
#define LOCHNAGAR2_PIN_GF_AIF2_TXDAT 72
#define LOCHNAGAR2_PIN_DSP_UART1_RX 73
#define LOCHNAGAR2_PIN_DSP_UART1_TX 74
#define LOCHNAGAR2_PIN_DSP_UART2_RX 75
#define LOCHNAGAR2_PIN_DSP_UART2_TX 76
#define LOCHNAGAR2_PIN_GF_UART2_RX 77
#define LOCHNAGAR2_PIN_GF_UART2_TX 78
#define LOCHNAGAR2_PIN_USB_UART_RX 79
#define LOCHNAGAR2_PIN_CDC_PDMCLK1 80
#define LOCHNAGAR2_PIN_CDC_PDMDAT1 81
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.