include/dt-bindings/pinctrl/pads-imx8qxp.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/pinctrl/pads-imx8qxp.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/pinctrl/pads-imx8qxp.h
Extension
.h
Size
69923 bytes
Lines
752
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _IMX8QXP_PADS_H
#define _IMX8QXP_PADS_H

/* pin id */
#define IMX8QXP_PCIE_CTRL0_PERST_B                  0
#define IMX8QXP_PCIE_CTRL0_CLKREQ_B                 1
#define IMX8QXP_PCIE_CTRL0_WAKE_B                   2
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP       3
#define IMX8QXP_USB_SS3_TC0                         4
#define IMX8QXP_USB_SS3_TC1                         5
#define IMX8QXP_USB_SS3_TC2                         6
#define IMX8QXP_USB_SS3_TC3                         7
#define IMX8QXP_COMP_CTL_GPIO_3V3_USB3IO            8
#define IMX8QXP_EMMC0_CLK                           9
#define IMX8QXP_EMMC0_CMD                           10
#define IMX8QXP_EMMC0_DATA0                         11
#define IMX8QXP_EMMC0_DATA1                         12
#define IMX8QXP_EMMC0_DATA2                         13
#define IMX8QXP_EMMC0_DATA3                         14
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX0       15
#define IMX8QXP_EMMC0_DATA4                         16
#define IMX8QXP_EMMC0_DATA5                         17
#define IMX8QXP_EMMC0_DATA6                         18
#define IMX8QXP_EMMC0_DATA7                         19
#define IMX8QXP_EMMC0_STROBE                        20
#define IMX8QXP_EMMC0_RESET_B                       21
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX1       22
#define IMX8QXP_USDHC1_RESET_B                      23
#define IMX8QXP_USDHC1_VSELECT                      24
#define IMX8QXP_CTL_NAND_RE_P_N                     25
#define IMX8QXP_USDHC1_WP                           26
#define IMX8QXP_USDHC1_CD_B                         27
#define IMX8QXP_CTL_NAND_DQS_P_N                    28
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSELSEP       29
#define IMX8QXP_USDHC1_CLK                          30
#define IMX8QXP_USDHC1_CMD                          31
#define IMX8QXP_USDHC1_DATA0                        32
#define IMX8QXP_USDHC1_DATA1                        33
#define IMX8QXP_USDHC1_DATA2                        34
#define IMX8QXP_USDHC1_DATA3                        35
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSEL3         36
#define IMX8QXP_ENET0_RGMII_TXC                     37
#define IMX8QXP_ENET0_RGMII_TX_CTL                  38
#define IMX8QXP_ENET0_RGMII_TXD0                    39
#define IMX8QXP_ENET0_RGMII_TXD1                    40
#define IMX8QXP_ENET0_RGMII_TXD2                    41
#define IMX8QXP_ENET0_RGMII_TXD3                    42
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0   43
#define IMX8QXP_ENET0_RGMII_RXC                     44
#define IMX8QXP_ENET0_RGMII_RX_CTL                  45
#define IMX8QXP_ENET0_RGMII_RXD0                    46
#define IMX8QXP_ENET0_RGMII_RXD1                    47
#define IMX8QXP_ENET0_RGMII_RXD2                    48
#define IMX8QXP_ENET0_RGMII_RXD3                    49
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1   50
#define IMX8QXP_ENET0_REFCLK_125M_25M               51
#define IMX8QXP_ENET0_MDIO                          52
#define IMX8QXP_ENET0_MDC                           53
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOCT        54
#define IMX8QXP_ESAI0_FSR                           55
#define IMX8QXP_ESAI0_FST                           56
#define IMX8QXP_ESAI0_SCKR                          57
#define IMX8QXP_ESAI0_SCKT                          58
#define IMX8QXP_ESAI0_TX0                           59
#define IMX8QXP_ESAI0_TX1                           60
#define IMX8QXP_ESAI0_TX2_RX3                       61
#define IMX8QXP_ESAI0_TX3_RX2                       62
#define IMX8QXP_ESAI0_TX4_RX1                       63
#define IMX8QXP_ESAI0_TX5_RX0                       64
#define IMX8QXP_SPDIF0_RX                           65
#define IMX8QXP_SPDIF0_TX                           66
#define IMX8QXP_SPDIF0_EXT_CLK                      67
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB       68
#define IMX8QXP_SPI3_SCK                            69
#define IMX8QXP_SPI3_SDO                            70
#define IMX8QXP_SPI3_SDI                            71
#define IMX8QXP_SPI3_CS0                            72
#define IMX8QXP_SPI3_CS1                            73
#define IMX8QXP_MCLK_IN1                            74
#define IMX8QXP_MCLK_IN0                            75
#define IMX8QXP_MCLK_OUT0                           76
#define IMX8QXP_UART1_TX                            77
#define IMX8QXP_UART1_RX                            78
#define IMX8QXP_UART1_RTS_B                         79
#define IMX8QXP_UART1_CTS_B                         80
#define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHK       81
#define IMX8QXP_SAI0_TXD                            82
#define IMX8QXP_SAI0_TXC                            83
#define IMX8QXP_SAI0_RXD                            84
#define IMX8QXP_SAI0_TXFS                           85

Annotation

Implementation Notes