include/dt-bindings/reset/eswin,eic7700-reset.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/reset/eswin,eic7700-reset.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/reset/eswin,eic7700-reset.h
Extension
.h
Size
10394 bytes
Lines
299
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DT_ESWIN_EIC7700_RESET_H__
#define __DT_ESWIN_EIC7700_RESET_H__

#define EIC7700_RESET_NOC_NSP		0
#define EIC7700_RESET_NOC_CFG		1
#define EIC7700_RESET_RNOC_NSP		2
#define EIC7700_RESET_SNOC_TCU		3
#define EIC7700_RESET_SNOC_U84		4
#define EIC7700_RESET_SNOC_PCIE_XSR	5
#define EIC7700_RESET_SNOC_PCIE_XMR	6
#define EIC7700_RESET_SNOC_PCIE_PR	7
#define EIC7700_RESET_SNOC_NPU		8
#define EIC7700_RESET_SNOC_JTAG		9
#define EIC7700_RESET_SNOC_DSP		10
#define EIC7700_RESET_SNOC_DDRC1_P2	11
#define EIC7700_RESET_SNOC_DDRC1_P1	12
#define EIC7700_RESET_SNOC_DDRC0_P2	13
#define EIC7700_RESET_SNOC_DDRC0_P1	14
#define EIC7700_RESET_SNOC_D2D		15
#define EIC7700_RESET_SNOC_AON		16
#define EIC7700_RESET_GPU_AXI		17
#define EIC7700_RESET_GPU_CFG		18
#define EIC7700_RESET_GPU_GRAY		19
#define EIC7700_RESET_GPU_JONES		20
#define EIC7700_RESET_GPU_SPU		21
#define EIC7700_RESET_DSP_AXI		22
#define EIC7700_RESET_DSP_CFG		23
#define EIC7700_RESET_DSP_DIV4		24
#define EIC7700_RESET_DSP_DIV0		25
#define EIC7700_RESET_DSP_DIV1		26
#define EIC7700_RESET_DSP_DIV2		27
#define EIC7700_RESET_DSP_DIV3		28
#define EIC7700_RESET_D2D_AXI		29
#define EIC7700_RESET_D2D_CFG		30
#define EIC7700_RESET_D2D_PRST		31
#define EIC7700_RESET_D2D_RAW_PCS	32
#define EIC7700_RESET_D2D_RX		33
#define EIC7700_RESET_D2D_TX		34
#define EIC7700_RESET_D2D_CORE		35
#define EIC7700_RESET_DDR1_ARST		36
#define EIC7700_RESET_DDR1_TRACE	37
#define EIC7700_RESET_DDR0_ARST		38
#define EIC7700_RESET_DDR_CFG		39
#define EIC7700_RESET_DDR0_TRACE	40
#define EIC7700_RESET_DDR_CORE		41
#define EIC7700_RESET_DDR_PRST		42
#define EIC7700_RESET_TCU_AXI		43
#define EIC7700_RESET_TCU_CFG		44
#define EIC7700_RESET_TCU_TBU0		45
#define EIC7700_RESET_TCU_TBU1		46
#define EIC7700_RESET_TCU_TBU2		47
#define EIC7700_RESET_TCU_TBU3		48
#define EIC7700_RESET_TCU_TBU4		49
#define EIC7700_RESET_TCU_TBU5		50
#define EIC7700_RESET_TCU_TBU6		51
#define EIC7700_RESET_TCU_TBU7		52
#define EIC7700_RESET_TCU_TBU8		53
#define EIC7700_RESET_TCU_TBU9		54
#define EIC7700_RESET_TCU_TBU10		55
#define EIC7700_RESET_TCU_TBU11		56
#define EIC7700_RESET_TCU_TBU12		57
#define EIC7700_RESET_TCU_TBU13		58
#define EIC7700_RESET_TCU_TBU14		59
#define EIC7700_RESET_TCU_TBU15		60
#define EIC7700_RESET_TCU_TBU16		61
#define EIC7700_RESET_NPU_AXI		62
#define EIC7700_RESET_NPU_CFG		63
#define EIC7700_RESET_NPU_CORE		64
#define EIC7700_RESET_NPU_E31CORE	65
#define EIC7700_RESET_NPU_E31BUS	66
#define EIC7700_RESET_NPU_E31DBG	67
#define EIC7700_RESET_NPU_LLC		68
#define EIC7700_RESET_HSP_AXI		69
#define EIC7700_RESET_HSP_CFG		70
#define EIC7700_RESET_HSP_POR		71
#define EIC7700_RESET_MSHC0_PHY		72
#define EIC7700_RESET_MSHC1_PHY		73
#define EIC7700_RESET_MSHC2_PHY		74
#define EIC7700_RESET_MSHC0_TXRX	75
#define EIC7700_RESET_MSHC1_TXRX	76
#define EIC7700_RESET_MSHC2_TXRX	77
#define EIC7700_RESET_SATA_ASIC0	78
#define EIC7700_RESET_SATA_OOB		79
#define EIC7700_RESET_SATA_PMALIVE	80
#define EIC7700_RESET_SATA_RBC		81
#define EIC7700_RESET_DMA0		82
#define EIC7700_RESET_HSP_DMA		83
#define EIC7700_RESET_USB0_VAUX		84
#define EIC7700_RESET_USB1_VAUX		85
#define EIC7700_RESET_HSP_SD1_PRST	86

Annotation

Implementation Notes