include/dt-bindings/reset/qcom,gcc-ipq6018.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/reset/qcom,gcc-ipq6018.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/reset/qcom,gcc-ipq6018.h
Extension
.h
Size
5101 bytes
Lines
158
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_RESET_IPQ_GCC_6018_H
#define _DT_BINDINGS_RESET_IPQ_GCC_6018_H

#define GCC_BLSP1_BCR				0
#define GCC_BLSP1_QUP1_BCR			1
#define GCC_BLSP1_UART1_BCR			2
#define GCC_BLSP1_QUP2_BCR			3
#define GCC_BLSP1_UART2_BCR			4
#define GCC_BLSP1_QUP3_BCR			5
#define GCC_BLSP1_UART3_BCR			6
#define GCC_BLSP1_QUP4_BCR			7
#define GCC_BLSP1_UART4_BCR			8
#define GCC_BLSP1_QUP5_BCR			9
#define GCC_BLSP1_UART5_BCR			10
#define GCC_BLSP1_QUP6_BCR			11
#define GCC_BLSP1_UART6_BCR			12
#define GCC_IMEM_BCR				13
#define GCC_SMMU_BCR				14
#define GCC_APSS_TCU_BCR			15
#define GCC_SMMU_XPU_BCR			16
#define GCC_PCNOC_TBU_BCR			17
#define GCC_SMMU_CFG_BCR			18
#define GCC_PRNG_BCR				19
#define GCC_BOOT_ROM_BCR			20
#define GCC_CRYPTO_BCR				21
#define GCC_WCSS_BCR				22
#define GCC_WCSS_Q6_BCR				23
#define GCC_NSS_BCR				24
#define GCC_SEC_CTRL_BCR			25
#define GCC_DDRSS_BCR				26
#define GCC_SYSTEM_NOC_BCR			27
#define GCC_PCNOC_BCR				28
#define GCC_TCSR_BCR				29
#define GCC_QDSS_BCR				30
#define GCC_DCD_BCR				31
#define GCC_MSG_RAM_BCR				32
#define GCC_MPM_BCR				33
#define GCC_SPDM_BCR				34
#define GCC_RBCPR_BCR				35
#define GCC_RBCPR_MX_BCR			36
#define GCC_TLMM_BCR				37
#define GCC_RBCPR_WCSS_BCR			38
#define GCC_USB0_PHY_BCR			39
#define GCC_USB3PHY_0_PHY_BCR			40
#define GCC_USB0_BCR				41
#define GCC_USB1_BCR				42
#define GCC_QUSB2_0_PHY_BCR			43
#define GCC_QUSB2_1_PHY_BCR			44
#define GCC_SDCC1_BCR				45
#define GCC_SNOC_BUS_TIMEOUT0_BCR		46
#define GCC_SNOC_BUS_TIMEOUT1_BCR		47
#define GCC_SNOC_BUS_TIMEOUT2_BCR		48
#define GCC_PCNOC_BUS_TIMEOUT0_BCR		49
#define GCC_PCNOC_BUS_TIMEOUT1_BCR		50
#define GCC_PCNOC_BUS_TIMEOUT2_BCR		51
#define GCC_PCNOC_BUS_TIMEOUT3_BCR		52
#define GCC_PCNOC_BUS_TIMEOUT4_BCR		53
#define GCC_PCNOC_BUS_TIMEOUT5_BCR		54
#define GCC_PCNOC_BUS_TIMEOUT6_BCR		55
#define GCC_PCNOC_BUS_TIMEOUT7_BCR		56
#define GCC_PCNOC_BUS_TIMEOUT8_BCR		57
#define GCC_PCNOC_BUS_TIMEOUT9_BCR		58
#define GCC_UNIPHY0_BCR				59
#define GCC_UNIPHY1_BCR				60
#define GCC_CMN_12GPLL_BCR			61
#define GCC_QPIC_BCR				62
#define GCC_MDIO_BCR				63
#define GCC_WCSS_CORE_TBU_BCR			64
#define GCC_WCSS_Q6_TBU_BCR			65
#define GCC_USB0_TBU_BCR			66
#define GCC_PCIE0_TBU_BCR			67
#define GCC_PCIE0_BCR				68
#define GCC_PCIE0_PHY_BCR			69
#define GCC_PCIE0PHY_PHY_BCR			70
#define GCC_PCIE0_LINK_DOWN_BCR			71
#define GCC_DCC_BCR				72
#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR	73
#define GCC_SMMU_CATS_BCR			74
#define GCC_UBI0_AXI_ARES			75
#define GCC_UBI0_AHB_ARES			76
#define GCC_UBI0_NC_AXI_ARES			77
#define GCC_UBI0_DBG_ARES			78
#define GCC_UBI0_CORE_CLAMP_ENABLE		79
#define GCC_UBI0_CLKRST_CLAMP_ENABLE		80
#define GCC_UBI0_UTCM_ARES			81
#define GCC_NSS_CFG_ARES			82
#define GCC_NSS_NOC_ARES			83
#define GCC_NSS_CRYPTO_ARES			84
#define GCC_NSS_CSR_ARES			85
#define GCC_NSS_CE_APB_ARES			86

Annotation

Implementation Notes