include/dt-bindings/reset/rockchip,rk3506-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/reset/rockchip,rk3506-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/reset/rockchip,rk3506-cru.h- Extension
.h- Size
- 5019 bytes
- Lines
- 212
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
/* CRU-->SOFTRST_CON00 */
#define SRST_NCOREPORESET0_AC 0
#define SRST_NCOREPORESET1_AC 1
#define SRST_NCOREPORESET2_AC 2
#define SRST_NCORESET0_AC 3
#define SRST_NCORESET1_AC 4
#define SRST_NCORESET2_AC 5
#define SRST_NL2RESET_AC 6
#define SRST_A_CORE_BIU_AC 7
#define SRST_H_M0_AC 8
/* CRU-->SOFTRST_CON02 */
#define SRST_NDBGRESET 9
#define SRST_P_CORE_BIU 10
#define SRST_PMU 11
/* CRU-->SOFTRST_CON03 */
#define SRST_P_DBG 12
#define SRST_POT_DBG 13
#define SRST_P_CORE_GRF 14
#define SRST_CORE_EMA_DETECT 15
#define SRST_REF_PVTPLL_CORE 16
#define SRST_P_GPIO1 17
#define SRST_DB_GPIO1 18
/* CRU-->SOFTRST_CON04 */
#define SRST_A_CORE_PERI_BIU 19
#define SRST_A_DSMC 20
#define SRST_P_DSMC 21
#define SRST_FLEXBUS 22
#define SRST_A_FLEXBUS 23
#define SRST_H_FLEXBUS 24
#define SRST_A_DSMC_SLV 25
#define SRST_H_DSMC_SLV 26
#define SRST_DSMC_SLV 27
/* CRU-->SOFTRST_CON05 */
#define SRST_A_BUS_BIU 28
#define SRST_H_BUS_BIU 29
#define SRST_P_BUS_BIU 30
#define SRST_A_SYSRAM 31
#define SRST_H_SYSRAM 32
#define SRST_A_DMAC0 33
#define SRST_A_DMAC1 34
#define SRST_H_M0 35
#define SRST_M0_JTAG 36
#define SRST_H_CRYPTO 37
/* CRU-->SOFTRST_CON06 */
#define SRST_H_RNG 38
#define SRST_P_BUS_GRF 39
#define SRST_P_TIMER0 40
#define SRST_TIMER0_CH0 41
#define SRST_TIMER0_CH1 42
#define SRST_TIMER0_CH2 43
#define SRST_TIMER0_CH3 44
#define SRST_TIMER0_CH4 45
#define SRST_TIMER0_CH5 46
#define SRST_P_WDT0 47
#define SRST_T_WDT0 48
#define SRST_P_WDT1 49
#define SRST_T_WDT1 50
#define SRST_P_MAILBOX 51
#define SRST_P_INTMUX 52
#define SRST_P_SPINLOCK 53
/* CRU-->SOFTRST_CON07 */
#define SRST_P_DDRC 54
#define SRST_H_DDRPHY 55
#define SRST_P_DDRMON 56
#define SRST_DDRMON_OSC 57
#define SRST_P_DDR_LPC 58
#define SRST_H_USBOTG0 59
#define SRST_USBOTG0_ADP 60
#define SRST_H_USBOTG1 61
#define SRST_USBOTG1_ADP 62
#define SRST_P_USBPHY 63
#define SRST_USBPHY_POR 64
#define SRST_USBPHY_OTG0 65
#define SRST_USBPHY_OTG1 66
/* CRU-->SOFTRST_CON08 */
#define SRST_A_DMA2DDR 67
#define SRST_P_DMA2DDR 68
/* CRU-->SOFTRST_CON09 */
#define SRST_USBOTG0_UTMI 69
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.