include/dt-bindings/reset/rockchip,rk3588-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/reset/rockchip,rk3588-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/reset/rockchip,rk3588-cru.h- Extension
.h- Size
- 21524 bytes
- Lines
- 796
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H
#define _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H
#define SRST_A_TOP_BIU 0
#define SRST_P_TOP_BIU 1
#define SRST_P_CSIPHY0 2
#define SRST_CSIPHY0 3
#define SRST_P_CSIPHY1 4
#define SRST_CSIPHY1 5
#define SRST_A_TOP_M500_BIU 6
#define SRST_A_TOP_M400_BIU 7
#define SRST_A_TOP_S200_BIU 8
#define SRST_A_TOP_S400_BIU 9
#define SRST_A_TOP_M300_BIU 10
#define SRST_USBDP_COMBO_PHY0_INIT 11
#define SRST_USBDP_COMBO_PHY0_CMN 12
#define SRST_USBDP_COMBO_PHY0_LANE 13
#define SRST_USBDP_COMBO_PHY0_PCS 14
#define SRST_USBDP_COMBO_PHY1_INIT 15
#define SRST_USBDP_COMBO_PHY1_CMN 16
#define SRST_USBDP_COMBO_PHY1_LANE 17
#define SRST_USBDP_COMBO_PHY1_PCS 18
#define SRST_DCPHY0 19
#define SRST_P_MIPI_DCPHY0 20
#define SRST_P_MIPI_DCPHY0_GRF 21
#define SRST_DCPHY1 22
#define SRST_P_MIPI_DCPHY1 23
#define SRST_P_MIPI_DCPHY1_GRF 24
#define SRST_P_APB2ASB_SLV_CDPHY 25
#define SRST_P_APB2ASB_SLV_CSIPHY 26
#define SRST_P_APB2ASB_SLV_VCCIO3_5 27
#define SRST_P_APB2ASB_SLV_VCCIO6 28
#define SRST_P_APB2ASB_SLV_EMMCIO 29
#define SRST_P_APB2ASB_SLV_IOC_TOP 30
#define SRST_P_APB2ASB_SLV_IOC_RIGHT 31
#define SRST_P_CRU 32
#define SRST_A_CHANNEL_SECURE2VO1USB 33
#define SRST_A_CHANNEL_SECURE2CENTER 34
#define SRST_H_CHANNEL_SECURE2VO1USB 35
#define SRST_H_CHANNEL_SECURE2CENTER 36
#define SRST_P_CHANNEL_SECURE2VO1USB 37
#define SRST_P_CHANNEL_SECURE2CENTER 38
#define SRST_H_AUDIO_BIU 39
#define SRST_P_AUDIO_BIU 40
#define SRST_H_I2S0_8CH 41
#define SRST_M_I2S0_8CH_TX 42
#define SRST_M_I2S0_8CH_RX 43
#define SRST_P_ACDCDIG 44
#define SRST_H_I2S2_2CH 45
#define SRST_H_I2S3_2CH 46
#define SRST_M_I2S2_2CH 47
#define SRST_M_I2S3_2CH 48
#define SRST_DAC_ACDCDIG 49
#define SRST_H_SPDIF0 50
#define SRST_M_SPDIF0 51
#define SRST_H_SPDIF1 52
#define SRST_M_SPDIF1 53
#define SRST_H_PDM1 54
#define SRST_PDM1 55
#define SRST_A_BUS_BIU 56
#define SRST_P_BUS_BIU 57
#define SRST_A_GIC 58
#define SRST_A_GIC_DBG 59
#define SRST_A_DMAC0 60
#define SRST_A_DMAC1 61
#define SRST_A_DMAC2 62
#define SRST_P_I2C1 63
#define SRST_P_I2C2 64
#define SRST_P_I2C3 65
#define SRST_P_I2C4 66
#define SRST_P_I2C5 67
#define SRST_P_I2C6 68
#define SRST_P_I2C7 69
#define SRST_P_I2C8 70
#define SRST_I2C1 71
#define SRST_I2C2 72
#define SRST_I2C3 73
#define SRST_I2C4 74
#define SRST_I2C5 75
#define SRST_I2C6 76
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.