include/dt-bindings/reset/spacemit,k3-resets.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/reset/spacemit,k3-resets.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/reset/spacemit,k3-resets.h- Extension
.h- Size
- 6796 bytes
- Lines
- 196
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_RESET_SPACEMIT_K3_RESETS_H_
#define _DT_BINDINGS_RESET_SPACEMIT_K3_RESETS_H_
/* MPMU resets */
#define RESET_MPMU_WDT 0
#define RESET_MPMU_RIPC 1
/* APBC resets */
#define RESET_APBC_UART0 0
#define RESET_APBC_UART2 1
#define RESET_APBC_UART3 2
#define RESET_APBC_UART4 3
#define RESET_APBC_UART5 4
#define RESET_APBC_UART6 5
#define RESET_APBC_UART7 6
#define RESET_APBC_UART8 7
#define RESET_APBC_UART9 8
#define RESET_APBC_UART10 9
#define RESET_APBC_GPIO 10
#define RESET_APBC_PWM0 11
#define RESET_APBC_PWM1 12
#define RESET_APBC_PWM2 13
#define RESET_APBC_PWM3 14
#define RESET_APBC_PWM4 15
#define RESET_APBC_PWM5 16
#define RESET_APBC_PWM6 17
#define RESET_APBC_PWM7 18
#define RESET_APBC_PWM8 19
#define RESET_APBC_PWM9 20
#define RESET_APBC_PWM10 21
#define RESET_APBC_PWM11 22
#define RESET_APBC_PWM12 23
#define RESET_APBC_PWM13 24
#define RESET_APBC_PWM14 25
#define RESET_APBC_PWM15 26
#define RESET_APBC_PWM16 27
#define RESET_APBC_PWM17 28
#define RESET_APBC_PWM18 29
#define RESET_APBC_PWM19 30
#define RESET_APBC_SPI0 31
#define RESET_APBC_SPI1 32
#define RESET_APBC_SPI3 33
#define RESET_APBC_RTC 34
#define RESET_APBC_TWSI0 35
#define RESET_APBC_TWSI1 36
#define RESET_APBC_TWSI2 37
#define RESET_APBC_TWSI4 38
#define RESET_APBC_TWSI5 39
#define RESET_APBC_TWSI6 40
#define RESET_APBC_TWSI8 41
#define RESET_APBC_TIMERS0 42
#define RESET_APBC_TIMERS1 43
#define RESET_APBC_TIMERS2 44
#define RESET_APBC_TIMERS3 45
#define RESET_APBC_TIMERS4 46
#define RESET_APBC_TIMERS5 47
#define RESET_APBC_TIMERS6 48
#define RESET_APBC_TIMERS7 49
#define RESET_APBC_AIB 50
#define RESET_APBC_ONEWIRE 51
#define RESET_APBC_I2S0 52
#define RESET_APBC_I2S1 53
#define RESET_APBC_I2S2 54
#define RESET_APBC_I2S3 55
#define RESET_APBC_I2S4 56
#define RESET_APBC_I2S5 57
#define RESET_APBC_DRO 58
#define RESET_APBC_IR0 59
#define RESET_APBC_IR1 60
#define RESET_APBC_TSEN 61
#define RESET_IPC_AP2AUD 62
#define RESET_APBC_CAN0 63
#define RESET_APBC_CAN1 64
#define RESET_APBC_CAN2 65
#define RESET_APBC_CAN3 66
#define RESET_APBC_CAN4 67
/* APMU resets */
#define RESET_APMU_CSI 0
#define RESET_APMU_CCIC2PHY 1
#define RESET_APMU_CCIC3PHY 2
#define RESET_APMU_ISP_CIBUS 3
#define RESET_APMU_DSI_ESC 4
#define RESET_APMU_LCD 5
#define RESET_APMU_V2D 6
#define RESET_APMU_LCD_MCLK 7
#define RESET_APMU_LCD_DSCCLK 8
#define RESET_APMU_SC2_HCLK 9
#define RESET_APMU_CCIC_4X 10
#define RESET_APMU_CCIC1_PHY 11
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.