include/dt-bindings/thermal/mediatek,lvts-thermal.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/thermal/mediatek,lvts-thermal.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/thermal/mediatek,lvts-thermal.h
Extension
.h
Size
3177 bytes
Lines
113
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __MEDIATEK_LVTS_DT_H
#define __MEDIATEK_LVTS_DT_H

#define MT7987_CPU		0
#define MT7987_ETH2P5G		1

#define MT7988_CPU_0		0
#define MT7988_CPU_1		1
#define MT7988_ETH2P5G_0	2
#define MT7988_ETH2P5G_1	3
#define MT7988_TOPS_0		4
#define MT7988_TOPS_1		5
#define MT7988_ETHWARP_0	6
#define MT7988_ETHWARP_1	7

#define MT8186_LITTLE_CPU0	0
#define MT8186_LITTLE_CPU1	1
#define MT8186_LITTLE_CPU2	2
#define MT8186_CAM		3
#define MT8186_BIG_CPU0	4
#define MT8186_BIG_CPU1	5
#define MT8186_NNA		6
#define MT8186_ADSP		7
#define MT8186_GPU		8

#define MT8188_MCU_LITTLE_CPU0	0
#define MT8188_MCU_LITTLE_CPU1	1
#define MT8188_MCU_LITTLE_CPU2	2
#define MT8188_MCU_LITTLE_CPU3	3
#define MT8188_MCU_BIG_CPU0	4
#define MT8188_MCU_BIG_CPU1	5

#define MT8188_AP_APU		0
#define MT8188_AP_GPU0		1
#define MT8188_AP_GPU1		2
#define MT8188_AP_ADSP		3
#define MT8188_AP_VDO		4
#define MT8188_AP_INFRA		5
#define MT8188_AP_CAM1		6
#define MT8188_AP_CAM2		7

#define MT8195_MCU_BIG_CPU0     0
#define MT8195_MCU_BIG_CPU1     1
#define MT8195_MCU_BIG_CPU2     2
#define MT8195_MCU_BIG_CPU3     3
#define MT8195_MCU_LITTLE_CPU0  4
#define MT8195_MCU_LITTLE_CPU1  5
#define MT8195_MCU_LITTLE_CPU2  6
#define MT8195_MCU_LITTLE_CPU3  7

#define MT8195_AP_VPU0  8
#define MT8195_AP_VPU1  9
#define MT8195_AP_GPU0  10
#define MT8195_AP_GPU1  11
#define MT8195_AP_VDEC  12
#define MT8195_AP_IMG   13
#define MT8195_AP_INFRA 14
#define MT8195_AP_CAM0  15
#define MT8195_AP_CAM1  16

#define MT8192_MCU_BIG_CPU0     0
#define MT8192_MCU_BIG_CPU1     1
#define MT8192_MCU_BIG_CPU2     2
#define MT8192_MCU_BIG_CPU3     3
#define MT8192_MCU_LITTLE_CPU0  4
#define MT8192_MCU_LITTLE_CPU1  5
#define MT8192_MCU_LITTLE_CPU2  6
#define MT8192_MCU_LITTLE_CPU3  7

#define MT8192_AP_VPU0  8
#define MT8192_AP_VPU1  9
#define MT8192_AP_GPU0  10
#define MT8192_AP_GPU1  11
#define MT8192_AP_INFRA 12
#define MT8192_AP_CAM   13
#define MT8192_AP_MD0   14
#define MT8192_AP_MD1   15
#define MT8192_AP_MD2   16

#define MT8196_MCU_MEDIUM_CPU6_0        0
#define MT8196_MCU_MEDIUM_CPU6_1        1
#define MT8196_MCU_DSU2                 2
#define MT8196_MCU_DSU3                 3
#define MT8196_MCU_LITTLE_CPU3          4
#define MT8196_MCU_LITTLE_CPU0          5
#define MT8196_MCU_LITTLE_CPU1          6
#define MT8196_MCU_LITTLE_CPU2          7
#define MT8196_MCU_MEDIUM_CPU4_0        8
#define MT8196_MCU_MEDIUM_CPU4_1        9
#define MT8196_MCU_MEDIUM_CPU5_0        10

Annotation

Implementation Notes