include/linux/cpu_pm.h
Source file repositories/reference/linux-study-clean/include/linux/cpu_pm.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/cpu_pm.h- Extension
.h- Size
- 2433 bytes
- Lines
- 101
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/notifier.h
Detected Declarations
enum cpu_pm_eventfunction cpu_pm_register_notifierfunction cpu_pm_unregister_notifierfunction cpu_pm_enterfunction cpu_pm_exitfunction cpu_cluster_pm_enterfunction cpu_cluster_pm_exit
Annotated Snippet
#ifndef _LINUX_CPU_PM_H
#define _LINUX_CPU_PM_H
#include <linux/kernel.h>
#include <linux/notifier.h>
/*
* When a CPU goes to a low power state that turns off power to the CPU's
* power domain, the contents of some blocks (floating point coprocessors,
* interrupt controllers, caches, timers) in the same power domain can
* be lost. The cpm_pm notifiers provide a method for platform idle, suspend,
* and hotplug implementations to notify the drivers for these blocks that
* they may be reset.
*
* All cpu_pm notifications must be called with interrupts disabled.
*
* The notifications are split into two classes: CPU notifications and CPU
* cluster notifications.
*
* CPU notifications apply to a single CPU and must be called on the affected
* CPU. They are used to save per-cpu context for affected blocks.
*
* CPU cluster notifications apply to all CPUs in a single power domain. They
* are used to save any global context for affected blocks, and must be called
* after all the CPUs in the power domain have been notified of the low power
* state.
*/
/*
* Event codes passed as unsigned long val to notifier calls
*/
enum cpu_pm_event {
/* A single cpu is entering a low power state */
CPU_PM_ENTER,
/* A single cpu failed to enter a low power state */
CPU_PM_ENTER_FAILED,
/* A single cpu is exiting a low power state */
CPU_PM_EXIT,
/* A cpu power domain is entering a low power state */
CPU_CLUSTER_PM_ENTER,
/* A cpu power domain failed to enter a low power state */
CPU_CLUSTER_PM_ENTER_FAILED,
/* A cpu power domain is exiting a low power state */
CPU_CLUSTER_PM_EXIT,
};
#ifdef CONFIG_CPU_PM
int cpu_pm_register_notifier(struct notifier_block *nb);
int cpu_pm_unregister_notifier(struct notifier_block *nb);
int cpu_pm_enter(void);
int cpu_pm_exit(void);
int cpu_cluster_pm_enter(void);
int cpu_cluster_pm_exit(void);
#else
static inline int cpu_pm_register_notifier(struct notifier_block *nb)
{
return 0;
}
static inline int cpu_pm_unregister_notifier(struct notifier_block *nb)
{
return 0;
}
static inline int cpu_pm_enter(void)
{
return 0;
}
static inline int cpu_pm_exit(void)
{
return 0;
}
static inline int cpu_cluster_pm_enter(void)
{
return 0;
}
static inline int cpu_cluster_pm_exit(void)
{
return 0;
}
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/notifier.h`.
- Detected declarations: `enum cpu_pm_event`, `function cpu_pm_register_notifier`, `function cpu_pm_unregister_notifier`, `function cpu_pm_enter`, `function cpu_pm_exit`, `function cpu_cluster_pm_enter`, `function cpu_cluster_pm_exit`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.