include/linux/generic_pt/common.h
Source file repositories/reference/linux-study-clean/include/linux/generic_pt/common.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/generic_pt/common.h- Extension
.h- Size
- 6659 bytes
- Lines
- 217
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/build_bug.hlinux/bits.h
Detected Declarations
struct pt_commonstruct pt_amdv1struct pt_vtdssstruct pt_riscv_32struct pt_riscv_64struct pt_x86_64enum pt_features
Annotated Snippet
struct pt_common {
/**
* @top_of_table: Encodes the table top pointer and the top level in a
* single value. Must use READ_ONCE/WRITE_ONCE to access it. The lower
* bits of the aligned table pointer are used for the level.
*/
uintptr_t top_of_table;
/**
* @max_oasz_lg2: Maximum number of bits the OA can contain. Upper bits
* must be zero. This may be less than what the page table format
* supports, but must not be more.
*/
u8 max_oasz_lg2;
/**
* @max_vasz_lg2: Maximum number of bits the VA can contain. Upper bits
* are 0 or 1 depending on pt_full_va_prefix(). This may be less than
* what the page table format supports, but must not be more. When
* PT_FEAT_DYNAMIC_TOP is set this reflects the maximum VA capability.
*/
u8 max_vasz_lg2;
/**
* @features: Bitmap of `enum pt_features`
*/
unsigned int features;
};
/* Encoding parameters for top_of_table */
enum {
PT_TOP_LEVEL_BITS = 3,
PT_TOP_LEVEL_MASK = GENMASK(PT_TOP_LEVEL_BITS - 1, 0),
};
/**
* enum pt_features - Features turned on in the table. Each symbol is a bit
* position.
*/
enum pt_features {
/**
* @PT_FEAT_DMA_INCOHERENT: Cache flush page table memory before
* assuming the HW can read it. Otherwise a SMP release is sufficient
* for HW to read it.
*/
PT_FEAT_DMA_INCOHERENT,
/**
* @PT_FEAT_FULL_VA: The table can span the full VA range from 0 to
* PT_VADDR_MAX.
*/
PT_FEAT_FULL_VA,
/**
* @PT_FEAT_DYNAMIC_TOP: The table's top level can be increased
* dynamically during map. This requires HW support for atomically
* setting both the table top pointer and the starting table level.
*/
PT_FEAT_DYNAMIC_TOP,
/**
* @PT_FEAT_SIGN_EXTEND: The top most bit of the valid VA range sign
* extends up to the full pt_vaddr_t. This divides the page table into
* three VA ranges::
*
* 0 -> 2^N - 1 Lower
* 2^N -> (MAX - 2^N - 1) Non-Canonical
* MAX - 2^N -> MAX Upper
*
* In this mode pt_common::max_vasz_lg2 includes the sign bit and the
* upper bits that don't fall within the translation are just validated.
*
* If not set there is no sign extension and valid VA goes from 0 to 2^N
* - 1.
*/
PT_FEAT_SIGN_EXTEND,
/**
* @PT_FEAT_FLUSH_RANGE: IOTLB maintenance is done by flushing IOVA
* ranges which will clean out any walk cache or any IOPTE fully
* contained by the range. The optimization objective is to minimize the
* number of flushes even if ranges include IOVA gaps that do not need
* to be flushed.
*/
PT_FEAT_FLUSH_RANGE,
/**
* @PT_FEAT_FLUSH_RANGE_NO_GAPS: Like PT_FEAT_FLUSH_RANGE except that
* the optimization objective is to only flush IOVA that has been
* changed. This mode is suitable for cases like hypervisor shadowing
* where flushing unchanged ranges may cause the hypervisor to reparse
* significant amount of page table.
*/
PT_FEAT_FLUSH_RANGE_NO_GAPS,
/**
* @PT_FEAT_DETAILED_GATHER: Fill in the struct iommu_iotlb_gather pt
* sub structure with information about which levels were changed.
*/
Annotation
- Immediate include surface: `linux/types.h`, `linux/build_bug.h`, `linux/bits.h`.
- Detected declarations: `struct pt_common`, `struct pt_amdv1`, `struct pt_vtdss`, `struct pt_riscv_32`, `struct pt_riscv_64`, `struct pt_x86_64`, `enum pt_features`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.