include/linux/habanalabs/cpucp_if.h

File Facts

System

Linux kernel

Corpus path

include/linux/habanalabs/cpucp_if.h

Extension

.h

Size

44816 bytes

Lines

1438

Domain

Core OS

Bucket

Core Kernel Interface

Inferred role

Core OS: implementation source

Status

source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

• Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h
• linux/if_ether.h
• hl_boot_if.h

Detected Declarations

• struct cpucp_pkt_sync_err
• struct hl_eq_hbm_ecc_data
• struct hl_eq_header
• struct hl_eq_ecc_data
• struct hl_eq_sm_sei_data
• struct hl_eq_fw_alive
• struct hl_eq_intr_cause
• struct hl_eq_pcie_drain_ind_data
• struct hl_eq_razwi_lbw_info_regs
• struct hl_eq_razwi_hbw_info_regs
• struct hl_eq_razwi_info
• struct hl_eq_razwi_with_intr_cause
• struct hl_hbm_sei_header
• struct hbm_rd_addr
• struct hl_eq_hbm_sei_read_err_intr_info
• struct hl_eq_hbm_sei_ca_par_intr_info
• struct hbm_sei_wr_cmd_address
• struct hl_eq_hbm_sei_wr_par_intr_info
• struct hl_eq_hbm_sei_data
• struct hl_engine_arc_dccm_queue_full_irq
• struct hl_eq_engine_arc_intr_data
• struct hl_eq_addr_dec_intr_data
• struct hl_eq_entry
• struct cpucp_packet
• struct cpucp_unmask_irq_arr_packet
• struct cpucp_nic_status_packet
• struct cpucp_array_data_packet
• struct eq_generic_event
• struct cpucp_sensor
• struct cpucp_security_info
• struct cpucp_info
• struct cpucp_mac_addr
• struct cpucp_nic_info
• struct page_discard_info
• struct frac_val
• struct ser_val
• struct cpucp_nic_status
• struct cpucp_hbm_row_info
• struct cpucp_hbm_row_replaced_rows_info
• struct cpucp_sec_attest_info
• struct cpucp_dev_info_signed
• struct dcore_monitor_regs_data
• struct cpucp_monitor_dump
• enum eq_event_id
• enum hl_sm_sei_cause
• enum hl_fw_alive_severity
• enum hl_hbm_sei_cause
• enum hl_engine_arc_interrupt_type

Annotated Snippet

struct cpucp_pkt_sync_err {
	__le32 pi;
	__le32 ci;
};

struct hl_eq_hbm_ecc_data {
	/* SERR counter */
	__le32 sec_cnt;
	/* DERR counter */
	__le32 dec_cnt;
	/* Supplemental Information according to the mask bits */
	__le32 hbm_ecc_info;
	/* Address in hbm where the ecc happened */
	__le32 first_addr;
	/* SERR continuous address counter */
	__le32 sec_cont_cnt;
	__le32 pad;
};

/*
 * EVENT QUEUE
 */

struct hl_eq_header {
	__le32 reserved;
	__le32 ctl;
};

struct hl_eq_ecc_data {
	__le64 ecc_address;
	__le64 ecc_syndrom;
	__u8 memory_wrapper_idx;
	__u8 is_critical;
	__le16 block_id;
	__u8 pad[4];
};

enum hl_sm_sei_cause {
	SM_SEI_SO_OVERFLOW,
	SM_SEI_LBW_4B_UNALIGNED,
	SM_SEI_AXI_RESPONSE_ERR
};

struct hl_eq_sm_sei_data {
	__le32 sei_log;
	/* enum hl_sm_sei_cause */
	__u8 sei_cause;
	__u8 pad[3];
};

enum hl_fw_alive_severity {
	FW_ALIVE_SEVERITY_MINOR,
	FW_ALIVE_SEVERITY_CRITICAL
};

struct hl_eq_fw_alive {
	__le64 uptime_seconds;
	__le32 process_id;
	__le32 thread_id;
	/* enum hl_fw_alive_severity */
	__u8 severity;
	__u8 pad[7];
};

struct hl_eq_intr_cause {
	__le64 intr_cause_data;
};

struct hl_eq_pcie_drain_ind_data {
	struct hl_eq_intr_cause intr_cause;
	__le64 drain_wr_addr_lbw;
	__le64 drain_rd_addr_lbw;
	__le64 drain_wr_addr_hbw;
	__le64 drain_rd_addr_hbw;
};

struct hl_eq_razwi_lbw_info_regs {
	__le32 rr_aw_razwi_reg;
	__le32 rr_aw_razwi_id_reg;
	__le32 rr_ar_razwi_reg;
	__le32 rr_ar_razwi_id_reg;
};

struct hl_eq_razwi_hbw_info_regs {
	__le32 rr_aw_razwi_hi_reg;
	__le32 rr_aw_razwi_lo_reg;
	__le32 rr_aw_razwi_id_reg;
	__le32 rr_ar_razwi_hi_reg;
	__le32 rr_ar_razwi_lo_reg;
	__le32 rr_ar_razwi_id_reg;

Annotation

• Immediate include surface: `linux/types.h`, `linux/if_ether.h`, `hl_boot_if.h`.
• Detected declarations: `struct cpucp_pkt_sync_err`, `struct hl_eq_hbm_ecc_data`, `struct hl_eq_header`, `struct hl_eq_ecc_data`, `struct hl_eq_sm_sei_data`, `struct hl_eq_fw_alive`, `struct hl_eq_intr_cause`, `struct hl_eq_pcie_drain_ind_data`, `struct hl_eq_razwi_lbw_info_regs`, `struct hl_eq_razwi_hbw_info_regs`.
• Atlas domain: Core OS / Core Kernel Interface.
• Implementation status: source implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.