include/linux/i3c/master.h
Source file repositories/reference/linux-study-clean/include/linux/i3c/master.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/i3c/master.h- Extension
.h- Size
- 29930 bytes
- Lines
- 756
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/bitsperlong.hlinux/bitops.hlinux/i2c.hlinux/i3c/ccc.hlinux/i3c/device.hlinux/rwsem.hlinux/spinlock.hlinux/workqueue.h
Detected Declarations
struct i2c_clientstruct i3c_master_controllerstruct i3c_busstruct i3c_devicestruct i3c_i2c_dev_descstruct i2c_dev_boardinfostruct i2c_dev_descstruct i3c_ibi_slotstruct i3c_device_ibi_infostruct i3c_dev_boardinfostruct i3c_dev_descstruct i3c_devicestruct i3c_busstruct i3c_master_controller_opsstruct i3c_master_controllerstruct i3c_dmastruct i3c_generic_ibi_poolenum i3c_bus_modeenum i3c_open_drain_speedenum i3c_addr_slot_statusfunction i3c_dev_get_master_datafunction i3c_dev_set_master_datafunction i2c_dev_get_master_datafunction i2c_dev_set_master_datafunction i3c_dev_get_masterfunction i2c_dev_get_masterfunction i3c_master_get_bus
Annotated Snippet
extern const struct bus_type i3c_bus_type;
/**
* struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
* @node: node element used to insert the slot into the I2C or I3C device
* list
* @master: I3C master that instantiated this device. Will be used to do
* I2C/I3C transfers
* @master_priv: master private data assigned to the device. Can be used to
* add master specific information
*
* This structure is describing common I3C/I2C dev information.
*/
struct i3c_i2c_dev_desc {
struct list_head node;
struct i3c_master_controller *master;
void *master_priv;
};
#define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
#define I3C_LVR_I2C_INDEX(x) ((x) << 5)
#define I3C_LVR_I2C_FM_MODE BIT(4)
#define I2C_MAX_ADDR GENMASK(6, 0)
/**
* struct i2c_dev_boardinfo - I2C device board information
* @node: used to insert the boardinfo object in the I2C boardinfo list
* @base: regular I2C board information
* @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
* the I2C device limitations
*
* This structure is used to attach board-level information to an I2C device.
* Each I2C device connected on the I3C bus should have one.
*/
struct i2c_dev_boardinfo {
struct list_head node;
struct i2c_board_info base;
u8 lvr;
};
/**
* struct i2c_dev_desc - I2C device descriptor
* @common: common part of the I2C device descriptor
* @dev: I2C device object registered to the I2C framework
* @addr: I2C device address
* @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
* the I2C device limitations
*
* Each I2C device connected on the bus will have an i2c_dev_desc.
* This object is created by the core and later attached to the controller
* using &struct_i3c_master_controller->ops->attach_i2c_dev().
*
* &struct_i2c_dev_desc is the internal representation of an I2C device
* connected on an I3C bus. This object is also passed to all
* &struct_i3c_master_controller_ops hooks.
*/
struct i2c_dev_desc {
struct i3c_i2c_dev_desc common;
struct i2c_client *dev;
u16 addr;
u8 lvr;
};
/**
* struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
* @work: work associated to this slot. The IBI handler will be called from
* there
* @dev: the I3C device that has generated this IBI
* @len: length of the payload associated to this IBI
* @data: payload buffer
*
* An IBI slot is an object pre-allocated by the controller and used when an
* IBI comes in.
* Every time an IBI comes in, the I3C master driver should find a free IBI
* slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
* i3c_master_queue_ibi().
*
* How IBI slots are allocated is left to the I3C master driver, though, for
* simple kmalloc-based allocation, the generic IBI slot pool can be used.
*/
struct i3c_ibi_slot {
struct work_struct work;
struct i3c_dev_desc *dev;
unsigned int len;
void *data;
};
/**
* struct i3c_device_ibi_info - IBI information attached to a specific device
Annotation
- Immediate include surface: `asm/bitsperlong.h`, `linux/bitops.h`, `linux/i2c.h`, `linux/i3c/ccc.h`, `linux/i3c/device.h`, `linux/rwsem.h`, `linux/spinlock.h`, `linux/workqueue.h`.
- Detected declarations: `struct i2c_client`, `struct i3c_master_controller`, `struct i3c_bus`, `struct i3c_device`, `struct i3c_i2c_dev_desc`, `struct i2c_dev_boardinfo`, `struct i2c_dev_desc`, `struct i3c_ibi_slot`, `struct i3c_device_ibi_info`, `struct i3c_dev_boardinfo`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.