include/linux/irqchip/arm-gic-v4.h
Source file repositories/reference/linux-study-clean/include/linux/irqchip/arm-gic-v4.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/irqchip/arm-gic-v4.h- Extension
.h- Size
- 3896 bytes
- Lines
- 161
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct its_vpestruct its_vmstruct its_vpestruct its_vlpi_mapstruct its_cmd_infostruct irq_domain_opsenum its_vcpu_info_cmd_type
Annotated Snippet
struct its_vm {
struct fwnode_handle *fwnode;
struct irq_domain *domain;
struct page *vprop_page;
struct its_vpe **vpes;
int nr_vpes;
irq_hw_number_t db_lpi_base;
unsigned long *db_bitmap;
int nr_db_lpis;
/*
* Ensures mutual exclusion between updates to vlpi_count[]
* and map/unmap when using the ITSList mechanism.
*
* The lock order for any sequence involving the ITSList is
* vmapp_lock -> vpe_lock ->vmovp_lock.
*/
raw_spinlock_t vmapp_lock;
u32 vlpi_count[GICv4_ITS_LIST_MAX];
};
/* Embedded in kvm_vcpu.arch */
struct its_vpe {
struct page *vpt_page;
struct its_vm *its_vm;
/* per-vPE VLPI tracking */
atomic_t vlpi_count;
/* Doorbell interrupt */
int irq;
irq_hw_number_t vpe_db_lpi;
/* VPE resident */
bool resident;
/* VPT parse complete */
bool ready;
union {
/* GICv4.0 implementations */
struct {
/* VPE proxy mapping */
int vpe_proxy_event;
/* Implementation Defined Area Invalid */
bool idai;
};
/* GICv4.1 implementations */
struct {
struct fwnode_handle *fwnode;
struct irq_domain *sgi_domain;
struct {
u8 priority;
bool enabled;
bool group;
} sgi_config[16];
};
};
/* Track the VPE being mapped */
atomic_t vmapp_count;
/*
* Ensures mutual exclusion between affinity setting of the
* vPE and vLPI operations using vpe->col_idx.
*/
raw_spinlock_t vpe_lock;
/*
* This collection ID is used to indirect the target
* redistributor for this VPE. The ID itself isn't involved in
* programming of the ITS.
*/
u16 col_idx;
/* Unique (system-wide) VPE identifier */
u16 vpe_id;
/* Pending VLPIs on schedule out? */
bool pending_last;
};
/*
* struct its_vlpi_map: structure describing the mapping of a
* VLPI. Only to be interpreted in the context of a physical interrupt
* it complements. To be used as the vcpu_info passed to
* irq_set_vcpu_affinity().
*
* @vm: Pointer to the GICv4 notion of a VM
* @vpe: Pointer to the GICv4 notion of a virtual CPU (VPE)
* @vintid: Virtual LPI number
* @properties: Priority and enable bits (as written in the prop table)
* @db_enabled: Is the VPE doorbell to be generated?
*/
struct its_vlpi_map {
struct its_vm *vm;
struct its_vpe *vpe;
u32 vintid;
u8 properties;
Annotation
- Detected declarations: `struct its_vpe`, `struct its_vm`, `struct its_vpe`, `struct its_vlpi_map`, `struct its_cmd_info`, `struct irq_domain_ops`, `enum its_vcpu_info_cmd_type`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.