include/linux/mfd/lochnagar2_regs.h

Source file repositories/reference/linux-study-clean/include/linux/mfd/lochnagar2_regs.h

File Facts

System
Linux kernel
Corpus path
include/linux/mfd/lochnagar2_regs.h
Extension
.h
Size
15550 bytes
Lines
292
Domain
Core OS
Bucket
Core Kernel Interface
Inferred role
Core OS: implementation source
Status
source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef LOCHNAGAR2_REGISTERS_H
#define LOCHNAGAR2_REGISTERS_H

/* Register Addresses */
#define LOCHNAGAR2_CDC_AIF1_CTRL                      0x000D
#define LOCHNAGAR2_CDC_AIF2_CTRL                      0x000E
#define LOCHNAGAR2_CDC_AIF3_CTRL                      0x000F
#define LOCHNAGAR2_DSP_AIF1_CTRL                      0x0010
#define LOCHNAGAR2_DSP_AIF2_CTRL                      0x0011
#define LOCHNAGAR2_PSIA1_CTRL                         0x0012
#define LOCHNAGAR2_PSIA2_CTRL                         0x0013
#define LOCHNAGAR2_GF_AIF3_CTRL                       0x0014
#define LOCHNAGAR2_GF_AIF4_CTRL                       0x0015
#define LOCHNAGAR2_GF_AIF1_CTRL                       0x0016
#define LOCHNAGAR2_GF_AIF2_CTRL                       0x0017
#define LOCHNAGAR2_SPDIF_AIF_CTRL                     0x0018
#define LOCHNAGAR2_USB_AIF1_CTRL                      0x0019
#define LOCHNAGAR2_USB_AIF2_CTRL                      0x001A
#define LOCHNAGAR2_ADAT_AIF_CTRL                      0x001B
#define LOCHNAGAR2_CDC_MCLK1_CTRL                     0x001E
#define LOCHNAGAR2_CDC_MCLK2_CTRL                     0x001F
#define LOCHNAGAR2_DSP_CLKIN_CTRL                     0x0020
#define LOCHNAGAR2_PSIA1_MCLK_CTRL                    0x0021
#define LOCHNAGAR2_PSIA2_MCLK_CTRL                    0x0022
#define LOCHNAGAR2_SPDIF_MCLK_CTRL                    0x0023
#define LOCHNAGAR2_GF_CLKOUT1_CTRL                    0x0024
#define LOCHNAGAR2_GF_CLKOUT2_CTRL                    0x0025
#define LOCHNAGAR2_ADAT_MCLK_CTRL                     0x0026
#define LOCHNAGAR2_SOUNDCARD_MCLK_CTRL                0x0027
#define LOCHNAGAR2_GPIO_FPGA_GPIO1                    0x0031
#define LOCHNAGAR2_GPIO_FPGA_GPIO2                    0x0032
#define LOCHNAGAR2_GPIO_FPGA_GPIO3                    0x0033
#define LOCHNAGAR2_GPIO_FPGA_GPIO4                    0x0034
#define LOCHNAGAR2_GPIO_FPGA_GPIO5                    0x0035
#define LOCHNAGAR2_GPIO_FPGA_GPIO6                    0x0036
#define LOCHNAGAR2_GPIO_CDC_GPIO1                     0x0037
#define LOCHNAGAR2_GPIO_CDC_GPIO2                     0x0038
#define LOCHNAGAR2_GPIO_CDC_GPIO3                     0x0039
#define LOCHNAGAR2_GPIO_CDC_GPIO4                     0x003A
#define LOCHNAGAR2_GPIO_CDC_GPIO5                     0x003B
#define LOCHNAGAR2_GPIO_CDC_GPIO6                     0x003C
#define LOCHNAGAR2_GPIO_CDC_GPIO7                     0x003D
#define LOCHNAGAR2_GPIO_CDC_GPIO8                     0x003E
#define LOCHNAGAR2_GPIO_DSP_GPIO1                     0x003F
#define LOCHNAGAR2_GPIO_DSP_GPIO2                     0x0040
#define LOCHNAGAR2_GPIO_DSP_GPIO3                     0x0041
#define LOCHNAGAR2_GPIO_DSP_GPIO4                     0x0042
#define LOCHNAGAR2_GPIO_DSP_GPIO5                     0x0043
#define LOCHNAGAR2_GPIO_DSP_GPIO6                     0x0044
#define LOCHNAGAR2_GPIO_GF_GPIO2                      0x0045
#define LOCHNAGAR2_GPIO_GF_GPIO3                      0x0046
#define LOCHNAGAR2_GPIO_GF_GPIO7                      0x0047
#define LOCHNAGAR2_GPIO_CDC_AIF1_BCLK                 0x0048
#define LOCHNAGAR2_GPIO_CDC_AIF1_RXDAT                0x0049
#define LOCHNAGAR2_GPIO_CDC_AIF1_LRCLK                0x004A
#define LOCHNAGAR2_GPIO_CDC_AIF1_TXDAT                0x004B
#define LOCHNAGAR2_GPIO_CDC_AIF2_BCLK                 0x004C
#define LOCHNAGAR2_GPIO_CDC_AIF2_RXDAT                0x004D
#define LOCHNAGAR2_GPIO_CDC_AIF2_LRCLK                0x004E
#define LOCHNAGAR2_GPIO_CDC_AIF2_TXDAT                0x004F
#define LOCHNAGAR2_GPIO_CDC_AIF3_BCLK                 0x0050
#define LOCHNAGAR2_GPIO_CDC_AIF3_RXDAT                0x0051
#define LOCHNAGAR2_GPIO_CDC_AIF3_LRCLK                0x0052
#define LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT                0x0053
#define LOCHNAGAR2_GPIO_DSP_AIF1_BCLK                 0x0054
#define LOCHNAGAR2_GPIO_DSP_AIF1_RXDAT                0x0055
#define LOCHNAGAR2_GPIO_DSP_AIF1_LRCLK                0x0056
#define LOCHNAGAR2_GPIO_DSP_AIF1_TXDAT                0x0057
#define LOCHNAGAR2_GPIO_DSP_AIF2_BCLK                 0x0058
#define LOCHNAGAR2_GPIO_DSP_AIF2_RXDAT                0x0059
#define LOCHNAGAR2_GPIO_DSP_AIF2_LRCLK                0x005A
#define LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT                0x005B
#define LOCHNAGAR2_GPIO_PSIA1_BCLK                    0x005C
#define LOCHNAGAR2_GPIO_PSIA1_RXDAT                   0x005D
#define LOCHNAGAR2_GPIO_PSIA1_LRCLK                   0x005E
#define LOCHNAGAR2_GPIO_PSIA1_TXDAT                   0x005F
#define LOCHNAGAR2_GPIO_PSIA2_BCLK                    0x0060
#define LOCHNAGAR2_GPIO_PSIA2_RXDAT                   0x0061
#define LOCHNAGAR2_GPIO_PSIA2_LRCLK                   0x0062
#define LOCHNAGAR2_GPIO_PSIA2_TXDAT                   0x0063
#define LOCHNAGAR2_GPIO_GF_AIF3_BCLK                  0x0064
#define LOCHNAGAR2_GPIO_GF_AIF3_RXDAT                 0x0065
#define LOCHNAGAR2_GPIO_GF_AIF3_LRCLK                 0x0066
#define LOCHNAGAR2_GPIO_GF_AIF3_TXDAT                 0x0067
#define LOCHNAGAR2_GPIO_GF_AIF4_BCLK                  0x0068
#define LOCHNAGAR2_GPIO_GF_AIF4_RXDAT                 0x0069
#define LOCHNAGAR2_GPIO_GF_AIF4_LRCLK                 0x006A
#define LOCHNAGAR2_GPIO_GF_AIF4_TXDAT                 0x006B
#define LOCHNAGAR2_GPIO_GF_AIF1_BCLK                  0x006C
#define LOCHNAGAR2_GPIO_GF_AIF1_RXDAT                 0x006D

Annotation

Implementation Notes