include/linux/mfd/wcd934x/registers.h

Source file repositories/reference/linux-study-clean/include/linux/mfd/wcd934x/registers.h

File Facts

System
Linux kernel
Corpus path
include/linux/mfd/wcd934x/registers.h
Extension
.h
Size
27469 bytes
Lines
589
Domain
Core OS
Bucket
Core Kernel Interface
Inferred role
Core OS: implementation source
Status
source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _WCD934X_REGISTERS_H
#define _WCD934X_REGISTERS_H

#define WCD934X_CODEC_RPM_CLK_GATE				0x0002
#define WCD934X_CODEC_RPM_CLK_GATE_MASK				GENMASK(1, 0)
#define WCD934X_CODEC_RPM_CLK_MCLK_CFG				0x0003
#define WCD934X_CODEC_RPM_CLK_MCLK_CFG_9P6MHZ			BIT(0)
#define WCD934X_CODEC_RPM_CLK_MCLK_CFG_12P288MHZ		BIT(1)
#define WCD934X_CODEC_RPM_CLK_MCLK_CFG_MCLK_MASK		GENMASK(1, 0)
#define WCD934X_CODEC_RPM_RST_CTL				0x0009
#define WCD934X_CODEC_RPM_PWR_CDC_DIG_HM_CTL			0x0011
#define WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE0			0x0021
#define WCD934X_CHIP_TIER_CTRL_CHIP_ID_BYTE2			0x0023
#define WCD934X_CHIP_TIER_CTRL_EFUSE_CTL			0x0025
#define WCD934X_EFUSE_SENSE_STATE_MASK				GENMASK(4, 1)
#define WCD934X_EFUSE_SENSE_STATE_DEF				0x10
#define WCD934X_EFUSE_SENSE_EN_MASK				BIT(0)
#define WCD934X_EFUSE_SENSE_ENABLE				BIT(0)
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT1			0x002a
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT2			0x002b
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT14			0x0037
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT15			0x0038
#define WCD934X_CHIP_TIER_CTRL_EFUSE_STATUS			0x0039
#define WCD934X_DATA_HUB_SB_TX10_INP_CFG			0x006b
#define WCD934X_DATA_HUB_SB_TX11_INP_CFG			0x006c
#define WCD934X_DATA_HUB_SB_TX13_INP_CFG			0x006e
#define WCD934X_CPE_FLL_CONFIG_CTL_2				0x0111
#define WCD934X_CPE_SS_CPARMAD_BUFRDY_INT_PERIOD		0x0213
#define WCD934X_CPE_SS_SVA_CFG					0x0214
#define WCD934X_CPE_SS_DMIC0_CTL				0x0218
#define WCD934X_CPE_SS_DMIC1_CTL				0x0219
#define WCD934X_DMIC_RATE_MASK					GENMASK(3, 1)
#define WCD934X_CPE_SS_DMIC2_CTL				0x021a
#define WCD934X_CPE_SS_DMIC_CFG					0x021b
#define WCD934X_CPE_SS_DMIC_CFG					0x021b
#define WCD934X_CPE_SS_CPAR_CFG					0x021c
#define WCD934X_INTR_PIN1_MASK0					0x0409
#define WCD934X_INTR_PIN1_STATUS0				0x0411
#define WCD934X_INTR_PIN1_CLEAR0				0x0419
#define WCD934X_INTR_PIN2_CLEAR3				0x0434
#define WCD934X_INTR_LEVEL0					0x0461
/* INTR_REG 0 */
#define	WCD934X_IRQ_SLIMBUS			0
#define	WCD934X_IRQ_MISC			1
#define	WCD934X_IRQ_HPH_PA_OCPL_FAULT		2
#define	WCD934X_IRQ_HPH_PA_OCPR_FAULT		3
#define	WCD934X_IRQ_EAR_PA_OCP_FAULT		4
#define	WCD934X_IRQ_HPH_PA_CNPL_COMPLETE	5
#define	WCD934X_IRQ_HPH_PA_CNPR_COMPLETE	6
#define	WCD934X_IRQ_EAR_PA_CNP_COMPLETE		7
/* INTR_REG 1 */
#define	WCD934X_IRQ_MBHC_SW_DET			8
#define	WCD934X_IRQ_MBHC_ELECT_INS_REM_DET	9
#define	WCD934X_IRQ_MBHC_BUTTON_PRESS_DET	10
#define	WCD934X_IRQ_MBHC_BUTTON_RELEASE_DET	11
#define	WCD934X_IRQ_MBHC_ELECT_INS_REM_LEG_DET	12
#define	WCD934X_IRQ_RESERVED_0			13
#define	WCD934X_IRQ_RESERVED_1			14
#define	WCD934X_IRQ_RESERVED_2			15
/* INTR_REG 2 */
#define	WCD934X_IRQ_LINE_PA1_CNP_COMPLETE	16
#define	WCD934X_IRQ_LINE_PA2_CNP_COMPLETE	17
#define	WCD934X_IRQ_SLNQ_ANALOG_ERROR		18
#define	WCD934X_IRQ_RESERVED_3			19
#define	WCD934X_IRQ_SOUNDWIRE			20
#define	WCD934X_IRQ_VDD_DIG_RAMP_COMPLETE	21
#define	WCD934X_IRQ_RCO_ERROR			22
#define	WCD934X_IRQ_CPE_ERROR			23
/* INTR_REG 3 */
#define	WCD934X_IRQ_MAD_AUDIO			24
#define	WCD934X_IRQ_MAD_BEACON			25
#define	WCD934X_IRQ_MAD_ULTRASOUND		26
#define	WCD934X_IRQ_VBAT_ATTACK			27
#define	WCD934X_IRQ_VBAT_RESTORE		28
#define	WCD934X_IRQ_CPE1_INTR			29
#define	WCD934X_IRQ_RESERVED_4			30
#define	WCD934X_IRQ_SLNQ_DIGITAL		31
#define WCD934X_NUM_IRQS			32
#define WCD934X_ANA_BIAS					0x0601
#define WCD934X_ANA_BIAS_EN_MASK				BIT(7)
#define WCD934X_ANA_BIAS_EN					BIT(7)
#define WCD934X_ANA_PRECHRG_EN_MASK				BIT(6)
#define WCD934X_ANA_PRECHRG_EN					BIT(6)
#define WCD934X_ANA_PRECHRG_MODE_MASK				BIT(5)
#define WCD934X_ANA_PRECHRG_MODE_AUTO				BIT(5)
#define WCD934X_ANA_RCO						0x0603
#define WCD934X_ANA_RCO_BG_EN_MASK				BIT(7)
#define WCD934X_ANA_RCO_BG_ENABLE				BIT(7)
#define WCD934X_ANA_BUCK_CTL					0x0606
#define WCD934X_ANA_BUCK_HI_ACCU_PRE_ENX_MASK			GENMASK(1, 0)

Annotation

Implementation Notes