include/linux/mfd/wm831x/regulator.h
Source file repositories/reference/linux-study-clean/include/linux/mfd/wm831x/regulator.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/mfd/wm831x/regulator.h- Extension
.h- Size
- 77397 bytes
- Lines
- 1214
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __MFD_WM831X_REGULATOR_H__
#define __MFD_WM831X_REGULATOR_H__
/*
* R16462 (0x404E) - Current Sink 1
*/
#define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
#define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
#define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
#define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */
#define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_SHIFT 14 /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */
#define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_SHIFT 12 /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */
#define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ON_RAMP_SHIFT 8 /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ON_RAMP_WIDTH 2 /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
#define WM831X_CS1_ISEL_SHIFT 0 /* CS1_ISEL - [5:0] */
#define WM831X_CS1_ISEL_WIDTH 6 /* CS1_ISEL - [5:0] */
/*
* R16463 (0x404F) - Current Sink 2
*/
#define WM831X_CS2_ENA 0x8000 /* CS2_ENA */
#define WM831X_CS2_ENA_MASK 0x8000 /* CS2_ENA */
#define WM831X_CS2_ENA_SHIFT 15 /* CS2_ENA */
#define WM831X_CS2_ENA_WIDTH 1 /* CS2_ENA */
#define WM831X_CS2_DRIVE 0x4000 /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_MASK 0x4000 /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_SHIFT 14 /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_WIDTH 1 /* CS2_DRIVE */
#define WM831X_CS2_SLPENA 0x1000 /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_MASK 0x1000 /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_SHIFT 12 /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_WIDTH 1 /* CS2_SLPENA */
#define WM831X_CS2_OFF_RAMP_MASK 0x0C00 /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_OFF_RAMP_SHIFT 10 /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_OFF_RAMP_WIDTH 2 /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_ON_RAMP_MASK 0x0300 /* CS2_ON_RAMP - [9:8] */
#define WM831X_CS2_ON_RAMP_SHIFT 8 /* CS2_ON_RAMP - [9:8] */
#define WM831X_CS2_ON_RAMP_WIDTH 2 /* CS2_ON_RAMP - [9:8] */
#define WM831X_CS2_ISEL_MASK 0x003F /* CS2_ISEL - [5:0] */
#define WM831X_CS2_ISEL_SHIFT 0 /* CS2_ISEL - [5:0] */
#define WM831X_CS2_ISEL_WIDTH 6 /* CS2_ISEL - [5:0] */
/*
* R16464 (0x4050) - DCDC Enable
*/
#define WM831X_EPE2_ENA 0x0080 /* EPE2_ENA */
#define WM831X_EPE2_ENA_MASK 0x0080 /* EPE2_ENA */
#define WM831X_EPE2_ENA_SHIFT 7 /* EPE2_ENA */
#define WM831X_EPE2_ENA_WIDTH 1 /* EPE2_ENA */
#define WM831X_EPE1_ENA 0x0040 /* EPE1_ENA */
#define WM831X_EPE1_ENA_MASK 0x0040 /* EPE1_ENA */
#define WM831X_EPE1_ENA_SHIFT 6 /* EPE1_ENA */
#define WM831X_EPE1_ENA_WIDTH 1 /* EPE1_ENA */
#define WM831X_DC4_ENA 0x0008 /* DC4_ENA */
#define WM831X_DC4_ENA_MASK 0x0008 /* DC4_ENA */
#define WM831X_DC4_ENA_SHIFT 3 /* DC4_ENA */
#define WM831X_DC4_ENA_WIDTH 1 /* DC4_ENA */
#define WM831X_DC3_ENA 0x0004 /* DC3_ENA */
#define WM831X_DC3_ENA_MASK 0x0004 /* DC3_ENA */
#define WM831X_DC3_ENA_SHIFT 2 /* DC3_ENA */
#define WM831X_DC3_ENA_WIDTH 1 /* DC3_ENA */
#define WM831X_DC2_ENA 0x0002 /* DC2_ENA */
#define WM831X_DC2_ENA_MASK 0x0002 /* DC2_ENA */
#define WM831X_DC2_ENA_SHIFT 1 /* DC2_ENA */
#define WM831X_DC2_ENA_WIDTH 1 /* DC2_ENA */
#define WM831X_DC1_ENA 0x0001 /* DC1_ENA */
#define WM831X_DC1_ENA_MASK 0x0001 /* DC1_ENA */
#define WM831X_DC1_ENA_SHIFT 0 /* DC1_ENA */
#define WM831X_DC1_ENA_WIDTH 1 /* DC1_ENA */
/*
* R16465 (0x4051) - LDO Enable
*/
#define WM831X_LDO11_ENA 0x0400 /* LDO11_ENA */
#define WM831X_LDO11_ENA_MASK 0x0400 /* LDO11_ENA */
#define WM831X_LDO11_ENA_SHIFT 10 /* LDO11_ENA */
#define WM831X_LDO11_ENA_WIDTH 1 /* LDO11_ENA */
#define WM831X_LDO10_ENA 0x0200 /* LDO10_ENA */
#define WM831X_LDO10_ENA_MASK 0x0200 /* LDO10_ENA */Annotation
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.