include/linux/mlx5/mlx5_ifc_fpga.h

Source file repositories/reference/linux-study-clean/include/linux/mlx5/mlx5_ifc_fpga.h

File Facts

System: Linux kernel
Corpus path: include/linux/mlx5/mlx5_ifc_fpga.h
Extension: .h
Size: 9076 bytes
Lines: 382
Domain: Core OS
Bucket: Core Kernel Interface
Inferred role: Core OS: implementation source
Status: source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

struct mlx5_ifc_fpga_shell_caps_bits
struct mlx5_ifc_fpga_cap_bits
struct mlx5_ifc_fpga_ctrl_bits
struct mlx5_ifc_fpga_error_event_bits
struct mlx5_ifc_fpga_access_reg_bits
struct mlx5_ifc_fpga_qpc_bits
struct mlx5_ifc_fpga_create_qp_in_bits
struct mlx5_ifc_fpga_create_qp_out_bits
struct mlx5_ifc_fpga_modify_qp_in_bits
struct mlx5_ifc_fpga_modify_qp_out_bits
struct mlx5_ifc_fpga_query_qp_in_bits
struct mlx5_ifc_fpga_query_qp_out_bits
struct mlx5_ifc_fpga_query_qp_counters_in_bits
struct mlx5_ifc_fpga_query_qp_counters_out_bits
struct mlx5_ifc_fpga_destroy_qp_in_bits
struct mlx5_ifc_fpga_destroy_qp_out_bits
struct mlx5_ifc_fpga_qp_error_event_bits
enum mlx5_ifc_fpga_qp_state
enum mlx5_ifc_fpga_qp_type
enum mlx5_ifc_fpga_qp_service_type

Annotated Snippet

struct mlx5_ifc_fpga_shell_caps_bits {
	u8         max_num_qps[0x10];
	u8         reserved_at_10[0x8];
	u8         total_rcv_credits[0x8];

	u8         reserved_at_20[0xe];
	u8         qp_type[0x2];
	u8         reserved_at_30[0x5];
	u8         rae[0x1];
	u8         rwe[0x1];
	u8         rre[0x1];
	u8         reserved_at_38[0x4];
	u8         dc[0x1];
	u8         ud[0x1];
	u8         uc[0x1];
	u8         rc[0x1];

	u8         reserved_at_40[0x1a];
	u8         log_ddr_size[0x6];

	u8         max_fpga_qp_msg_size[0x20];

	u8         reserved_at_80[0x180];
};

struct mlx5_ifc_fpga_cap_bits {
	u8         fpga_id[0x8];
	u8         fpga_device[0x18];

	u8         register_file_ver[0x20];

	u8         fpga_ctrl_modify[0x1];
	u8         reserved_at_41[0x5];
	u8         access_reg_query_mode[0x2];
	u8         reserved_at_48[0x6];
	u8         access_reg_modify_mode[0x2];
	u8         reserved_at_50[0x10];

	u8         reserved_at_60[0x20];

	u8         image_version[0x20];

	u8         image_date[0x20];

	u8         image_time[0x20];

	u8         shell_version[0x20];

	u8         reserved_at_100[0x80];

	struct mlx5_ifc_fpga_shell_caps_bits shell_caps;

	u8         reserved_at_380[0x8];
	u8         ieee_vendor_id[0x18];

	u8         sandbox_product_version[0x10];
	u8         sandbox_product_id[0x10];

	u8         sandbox_basic_caps[0x20];

	u8         reserved_at_3e0[0x10];
	u8         sandbox_extended_caps_len[0x10];

	u8         sandbox_extended_caps_addr[0x40];

	u8         fpga_ddr_start_addr[0x40];

	u8         fpga_cr_space_start_addr[0x40];

	u8         fpga_ddr_size[0x20];

	u8         fpga_cr_space_size[0x20];

	u8         reserved_at_500[0x300];
};

enum {
	MLX5_FPGA_CTRL_OPERATION_LOAD                = 0x1,
	MLX5_FPGA_CTRL_OPERATION_RESET               = 0x2,
	MLX5_FPGA_CTRL_OPERATION_FLASH_SELECT        = 0x3,
	MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_ON   = 0x4,
	MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_OFF  = 0x5,
	MLX5_FPGA_CTRL_OPERATION_RESET_SANDBOX       = 0x6,
};

struct mlx5_ifc_fpga_ctrl_bits {
	u8         reserved_at_0[0x8];
	u8         operation[0x8];
	u8         reserved_at_10[0x8];
	u8         status[0x8];

Annotation

Detected declarations: `struct mlx5_ifc_fpga_shell_caps_bits`, `struct mlx5_ifc_fpga_cap_bits`, `struct mlx5_ifc_fpga_ctrl_bits`, `struct mlx5_ifc_fpga_error_event_bits`, `struct mlx5_ifc_fpga_access_reg_bits`, `struct mlx5_ifc_fpga_qpc_bits`, `struct mlx5_ifc_fpga_create_qp_in_bits`, `struct mlx5_ifc_fpga_create_qp_out_bits`, `struct mlx5_ifc_fpga_modify_qp_in_bits`, `struct mlx5_ifc_fpga_modify_qp_out_bits`.
Atlas domain: Core OS / Core Kernel Interface.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.