include/linux/mtd/nand-ecc-mxic.h
Source file repositories/reference/linux-study-clean/include/linux/mtd/nand-ecc-mxic.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/mtd/nand-ecc-mxic.h- Extension
.h- Size
- 1353 bytes
- Lines
- 50
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/platform_device.hlinux/device.h
Detected Declarations
struct mxic_ecc_enginefunction mxic_ecc_get_pipelined_enginefunction mxic_ecc_put_pipelined_engine
Annotated Snippet
static inline void mxic_ecc_put_pipelined_engine(struct nand_ecc_engine *eng) {}
static inline int mxic_ecc_process_data_pipelined(struct nand_ecc_engine *eng,
unsigned int direction,
dma_addr_t dirmap)
{
return -EOPNOTSUPP;
}
#endif /* CONFIG_MTD_NAND_ECC_MXIC */
#endif /* __MTD_NAND_ECC_MXIC_H__ */
Annotation
- Immediate include surface: `linux/platform_device.h`, `linux/device.h`.
- Detected declarations: `struct mxic_ecc_engine`, `function mxic_ecc_get_pipelined_engine`, `function mxic_ecc_put_pipelined_engine`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.