include/linux/net/intel/i40e_client.h
Source file repositories/reference/linux-study-clean/include/linux/net/intel/i40e_client.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/net/intel/i40e_client.h- Extension
.h- Size
- 5472 bytes
- Lines
- 192
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/auxiliary_bus.h
Detected Declarations
struct i40e_client_versionstruct i40e_opsstruct i40e_clientstruct i40e_qv_infostruct i40e_qvlist_infostruct i40e_prio_qos_paramsstruct i40e_qos_paramsstruct i40e_paramsstruct i40e_infostruct i40e_auxiliary_devicestruct i40e_opsstruct i40e_client_opsstruct i40e_client_instancestruct i40e_clientenum i40e_client_instance_state
Annotated Snippet
struct i40e_client_version {
u8 major;
u8 minor;
u8 build;
u8 rsvd;
};
enum i40e_client_instance_state {
__I40E_CLIENT_INSTANCE_NONE,
__I40E_CLIENT_INSTANCE_OPENED,
};
struct i40e_ops;
struct i40e_client;
#define I40E_QUEUE_INVALID_IDX 0xFFFF
struct i40e_qv_info {
u32 v_idx; /* msix_vector */
u16 ceq_idx;
u16 aeq_idx;
u8 itr_idx;
};
struct i40e_qvlist_info {
u32 num_vectors;
struct i40e_qv_info qv_info[] __counted_by(num_vectors);
};
/* set of LAN parameters useful for clients managed by LAN */
/* Struct to hold per priority info */
struct i40e_prio_qos_params {
u16 qs_handle; /* qs handle for prio */
u8 tc; /* TC mapped to prio */
u8 reserved;
};
#define I40E_CLIENT_MAX_USER_PRIORITY 8
/* Struct to hold Client QoS */
struct i40e_qos_params {
struct i40e_prio_qos_params prio_qos[I40E_CLIENT_MAX_USER_PRIORITY];
};
struct i40e_params {
struct i40e_qos_params qos;
u16 mtu;
};
/* Structure to hold Lan device info for a client device */
struct i40e_info {
struct i40e_client_version version;
u8 lanmac[6];
struct net_device *netdev;
struct pci_dev *pcidev;
struct auxiliary_device *aux_dev;
u8 __iomem *hw_addr;
u8 fid; /* function id, PF id or VF id */
#define I40E_CLIENT_FTYPE_PF 0
u8 ftype; /* function type, PF or VF */
void *pf;
/* All L2 params that could change during the life span of the PF
* and needs to be communicated to the client when they change
*/
struct i40e_qvlist_info *qvlist_info;
struct i40e_params params;
struct i40e_ops *ops;
u16 msix_count; /* number of msix vectors*/
/* Array down below will be dynamically allocated based on msix_count */
struct msix_entry *msix_entries;
u16 itr_index; /* Which ITR index the PE driver is suppose to use */
u16 fw_maj_ver; /* firmware major version */
u16 fw_min_ver; /* firmware minor version */
u32 fw_build; /* firmware build number */
};
struct i40e_auxiliary_device {
struct auxiliary_device aux_dev;
struct i40e_info *ldev;
};
#define I40E_CLIENT_RESET_LEVEL_PF 1
#define I40E_CLIENT_RESET_LEVEL_CORE 2
#define I40E_CLIENT_VSI_FLAG_TCP_ENABLE BIT(1)
struct i40e_ops {
/* setup_q_vector_list enables queues with a particular vector */
Annotation
- Immediate include surface: `linux/auxiliary_bus.h`.
- Detected declarations: `struct i40e_client_version`, `struct i40e_ops`, `struct i40e_client`, `struct i40e_qv_info`, `struct i40e_qvlist_info`, `struct i40e_prio_qos_params`, `struct i40e_qos_params`, `struct i40e_params`, `struct i40e_info`, `struct i40e_auxiliary_device`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.