include/linux/perf/riscv_pmu.h

Source file repositories/reference/linux-study-clean/include/linux/perf/riscv_pmu.h

File Facts

System
Linux kernel
Corpus path
include/linux/perf/riscv_pmu.h
Extension
.h
Size
3165 bytes
Lines
98
Domain
Core OS
Bucket
Core Kernel Interface
Inferred role
Core OS: implementation source
Status
source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cpu_hw_events {
	/* currently enabled events */
	int			n_events;
	/* Counter overflow interrupt */
	int		irq;
	/* currently enabled events */
	struct perf_event	*events[RISCV_MAX_COUNTERS];
	/* currently enabled hardware counters */
	DECLARE_BITMAP(used_hw_ctrs, RISCV_MAX_COUNTERS);
	/* currently enabled firmware counters */
	DECLARE_BITMAP(used_fw_ctrs, RISCV_MAX_COUNTERS);
	/* The virtual address of the shared memory where counter snapshot will be taken */
	void *snapshot_addr;
	/* The physical address of the shared memory where counter snapshot will be taken */
	phys_addr_t snapshot_addr_phys;
	/* Boolean flag to indicate setup is already done */
	bool snapshot_set_done;
	/* A shadow copy of the counter values to avoid clobbering during multiple SBI calls */
	u64 snapshot_cval_shcopy[RISCV_MAX_COUNTERS];
};

struct riscv_pmu {
	struct pmu	pmu;
	char		*name;

	irqreturn_t	(*handle_irq)(int irq_num, void *dev);

	unsigned long	cmask;
	u64		(*ctr_read)(struct perf_event *event);
	int		(*ctr_get_idx)(struct perf_event *event);
	int		(*ctr_get_width)(int idx);
	void		(*ctr_clear_idx)(struct perf_event *event);
	void		(*ctr_start)(struct perf_event *event, u64 init_val);
	void		(*ctr_stop)(struct perf_event *event, unsigned long flag);
	int		(*event_map)(struct perf_event *event, u64 *config);
	void		(*event_init)(struct perf_event *event);
	void		(*event_mapped)(struct perf_event *event, struct mm_struct *mm);
	void		(*event_unmapped)(struct perf_event *event, struct mm_struct *mm);
	uint8_t		(*csr_index)(struct perf_event *event);

	struct cpu_hw_events	__percpu *hw_events;
	struct hlist_node	node;
	struct notifier_block   riscv_pm_nb;
};

#define to_riscv_pmu(p) (container_of(p, struct riscv_pmu, pmu))

void riscv_pmu_start(struct perf_event *event, int flags);
void riscv_pmu_stop(struct perf_event *event, int flags);
unsigned long riscv_pmu_ctr_read_csr(unsigned long csr);
int riscv_pmu_event_set_period(struct perf_event *event);
uint64_t riscv_pmu_ctr_get_width_mask(struct perf_event *event);
u64 riscv_pmu_event_update(struct perf_event *event);
#ifdef CONFIG_RISCV_PMU_LEGACY
void riscv_pmu_legacy_skip_init(void);
#else
static inline void riscv_pmu_legacy_skip_init(void) {};
#endif
struct riscv_pmu *riscv_pmu_alloc(void);
#ifdef CONFIG_RISCV_PMU_SBI
int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr);
int riscv_pmu_get_event_info(u32 type, u64 config, u64 *econfig);
#endif

#endif /* CONFIG_RISCV_PMU */

#endif /* _RISCV_PMU_H */

Annotation

Implementation Notes