include/linux/platform_data/emif_plat.h
Source file repositories/reference/linux-study-clean/include/linux/platform_data/emif_plat.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/platform_data/emif_plat.h- Extension
.h- Size
- 4010 bytes
- Lines
- 127
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct ddr_device_infostruct emif_custom_configsstruct emif_platform_data
Annotated Snippet
struct ddr_device_info {
u32 type;
u32 density;
u32 io_width;
u32 cs1_used;
u32 cal_resistors_per_cs;
char manufacturer[10];
};
/**
* struct emif_custom_configs - Custom configuration parameters/policies
* passed from the platform layer
* @mask: Mask to indicate which configs are requested
* @lpmode: LPMODE to be used in PWR_MGMT_CTRL register
* @lpmode_timeout_performance: Timeout before LPMODE entry when higher
* performance is desired at the cost of power (typically
* at higher OPPs)
* @lpmode_timeout_power: Timeout before LPMODE entry when better power
* savings is desired and performance is not important
* (typically at lower loads indicated by lower OPPs)
* @lpmode_freq_threshold: The DDR frequency threshold to identify between
* the above two cases:
* timeout = (freq >= lpmode_freq_threshold) ?
* lpmode_timeout_performance :
* lpmode_timeout_power;
* @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal
* temperature(in milliseconds). When temperature is high
* polling is done 4 times as frequently.
*/
struct emif_custom_configs {
u32 mask;
u32 lpmode;
u32 lpmode_timeout_performance;
u32 lpmode_timeout_power;
u32 lpmode_freq_threshold;
u32 temp_alert_poll_interval_ms;
};
/**
* struct emif_platform_data - Platform data passed on EMIF platform
* device creation. Used by the driver.
* @hw_caps: Hw capabilities of the EMIF IP in the respective SoC
* @device_info: Device info structure containing information such
* as type, bus width, density etc
* @timings: Timings information from device datasheet passed
* as an array of 'struct lpddr2_timings'. Can be NULL
* if if default timings are ok
* @timings_arr_size: Size of the timings array. Depends on the number
* of different frequencies for which timings data
* is provided
* @min_tck: Minimum value of some timing parameters in terms
* of number of cycles. Can be NULL if default values
* are ok
* @custom_configs: Custom configurations requested by SoC or board
* code and the data for them. Can be NULL if default
* configurations done by the driver are ok. See
* documentation for 'struct emif_custom_configs' for
* more details
*/
struct emif_platform_data {
u32 hw_caps;
struct ddr_device_info *device_info;
const struct lpddr2_timings *timings;
u32 timings_arr_size;
const struct lpddr2_min_tck *min_tck;
struct emif_custom_configs *custom_configs;
u32 ip_rev;
u32 phy_type;
};
#endif /* __ASSEMBLY__ */
#endif /* __LINUX_EMIF_H */
Annotation
- Detected declarations: `struct ddr_device_info`, `struct emif_custom_configs`, `struct emif_platform_data`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.