include/linux/regulator/mt6363-regulator.h

Source file repositories/reference/linux-study-clean/include/linux/regulator/mt6363-regulator.h

File Facts

System: Linux kernel
Corpus path: include/linux/regulator/mt6363-regulator.h
Extension: .h
Size: 14397 bytes
Lines: 331
Domain: Core OS
Bucket: Core Kernel Interface
Inferred role: Core OS: implementation source
Status: source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Dependency Surface

linux/bits.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#include <linux/bits.h>

#ifndef __LINUX_REGULATOR_MT6363_H
#define __LINUX_REGULATOR_MT6363_H

/* Register */
#define MT6363_TOP_TRAP				0x6
#define MT6363_TOP_TMA_KEY_L			0x36e
#define MT6363_RG_BUCK0_EN_ADDR			0x210
#define MT6363_RG_BUCK_VS2_EN_BIT		0
#define MT6363_RG_BUCK_VBUCK1_EN_BIT		1
#define MT6363_RG_BUCK_VBUCK2_EN_BIT		2
#define MT6363_RG_BUCK_VBUCK3_EN_BIT		3
#define MT6363_RG_BUCK_VBUCK4_EN_BIT		4
#define MT6363_RG_BUCK_VBUCK5_EN_BIT		5
#define MT6363_RG_BUCK_VBUCK6_EN_BIT		6
#define MT6363_RG_BUCK_VBUCK7_EN_BIT		7
#define MT6363_RG_BUCK1_EN_ADDR			0x213
#define MT6363_RG_BUCK_VS1_EN_BIT		0
#define MT6363_RG_BUCK_VS3_EN_BIT		1
#define MT6363_RG_LDO_VSRAM_DIGRF_EN_BIT	4
#define MT6363_RG_LDO_VSRAM_MDFE_EN_BIT		5
#define MT6363_RG_LDO_VSRAM_MODEM_EN_BIT	6
#define MT6363_RG_BUCK0_LP_ADDR			0x216
#define MT6363_RG_BUCK_VS2_LP_BIT		0
#define MT6363_RG_BUCK_VBUCK1_LP_BIT		1
#define MT6363_RG_BUCK_VBUCK2_LP_BIT		2
#define MT6363_RG_BUCK_VBUCK3_LP_BIT		3
#define MT6363_RG_BUCK_VBUCK4_LP_BIT		4
#define MT6363_RG_BUCK_VBUCK5_LP_BIT		5
#define MT6363_RG_BUCK_VBUCK6_LP_BIT		6
#define MT6363_RG_BUCK_VBUCK7_LP_BIT		7
#define MT6363_RG_BUCK1_LP_ADDR			0x219
#define MT6363_RG_BUCK_VS1_LP_BIT		0
#define MT6363_RG_BUCK_VS3_LP_BIT		1
#define MT6363_RG_LDO_VSRAM_DIGRF_LP_BIT	4
#define MT6363_RG_LDO_VSRAM_MDFE_LP_BIT		5
#define MT6363_RG_LDO_VSRAM_MODEM_LP_BIT	6
#define MT6363_RG_BUCK_VS2_VOSEL_ADDR		0x21c
#define MT6363_RG_BUCK_VS2_VOSEL_MASK		GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK1_VOSEL_ADDR	0x21d
#define MT6363_RG_BUCK_VBUCK1_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK2_VOSEL_ADDR	0x21e
#define MT6363_RG_BUCK_VBUCK2_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK3_VOSEL_ADDR	0x21f
#define MT6363_RG_BUCK_VBUCK3_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK4_VOSEL_ADDR	0x220
#define MT6363_RG_BUCK_VBUCK4_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK5_VOSEL_ADDR	0x221
#define MT6363_RG_BUCK_VBUCK5_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK6_VOSEL_ADDR	0x222
#define MT6363_RG_BUCK_VBUCK6_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VBUCK7_VOSEL_ADDR	0x223
#define MT6363_RG_BUCK_VBUCK7_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_RG_BUCK_VS1_VOSEL_ADDR		0x224
#define MT6363_RG_BUCK_VS1_VOSEL_MASK		GENMASK(7, 0)
#define MT6363_RG_BUCK_VS3_VOSEL_ADDR		0x225
#define MT6363_RG_BUCK_VS3_VOSEL_MASK		GENMASK(7, 0)
#define MT6363_RG_LDO_VSRAM_DIGRF_VOSEL_ADDR	0x228
#define MT6363_RG_LDO_VSRAM_DIGRF_VOSEL_MASK	GENMASK(6, 0)
#define MT6363_RG_LDO_VSRAM_MDFE_VOSEL_ADDR	0x229
#define MT6363_RG_LDO_VSRAM_MDFE_VOSEL_MASK	GENMASK(6, 0)
#define MT6363_RG_LDO_VSRAM_MODEM_VOSEL_ADDR	0x22a
#define MT6363_RG_LDO_VSRAM_MODEM_VOSEL_MASK	GENMASK(6, 0)
#define MT6363_BUCK_TOP_KEY_PROT_LO		0x13fa
#define MT6363_BUCK_VS2_WDTDBG_VOSEL_ADDR	0x13fc
#define MT6363_BUCK_VBUCK1_WDTDBG_VOSEL_ADDR	0x13fd
#define MT6363_BUCK_VBUCK2_WDTDBG_VOSEL_ADDR	0x13fe
#define MT6363_BUCK_VBUCK3_WDTDBG_VOSEL_ADDR	0x13ff
#define MT6363_BUCK_VBUCK4_WDTDBG_VOSEL_ADDR	0x1400
#define MT6363_BUCK_VBUCK5_WDTDBG_VOSEL_ADDR	0x1401
#define MT6363_BUCK_VBUCK6_WDTDBG_VOSEL_ADDR	0x1402
#define MT6363_BUCK_VBUCK7_WDTDBG_VOSEL_ADDR	0x1403
#define MT6363_BUCK_VS1_WDTDBG_VOSEL_ADDR	0x1404
#define MT6363_BUCK_VS3_WDTDBG_VOSEL_ADDR	0x1405
#define MT6363_RG_BUCK_EFUSE_RSV1		0x1417
#define MT6363_RG_BUCK_EFUSE_RSV1_MASK		GENMASK(7, 4)
#define MT6363_BUCK_VS2_OP_EN_0			0x145d
#define MT6363_BUCK_VS2_HW_LP_MODE		0x1468
#define MT6363_BUCK_VBUCK1_OP_EN_0		0x14dd
#define MT6363_BUCK_VBUCK1_HW_LP_MODE		0x14e8
#define MT6363_RG_BUCK_VBUCK1_SSHUB_EN_ADDR	0x14ea
#define MT6363_RG_BUCK_VBUCK1_SSHUB_VOSEL_ADDR	0x14eb
#define MT6363_RG_BUCK_VBUCK1_SSHUB_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_BUCK_VBUCK2_OP_EN_0		0x155d
#define MT6363_BUCK_VBUCK2_HW_LP_MODE		0x1568
#define MT6363_RG_BUCK_VBUCK2_SSHUB_EN_ADDR	0x156a
#define MT6363_RG_BUCK_VBUCK2_SSHUB_VOSEL_ADDR	0x156b
#define MT6363_RG_BUCK_VBUCK2_SSHUB_VOSEL_MASK	GENMASK(7, 0)
#define MT6363_BUCK_VBUCK3_OP_EN_0		0x15dd

Annotation

Immediate include surface: `linux/bits.h`.
Atlas domain: Core OS / Core Kernel Interface.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.