include/linux/scx200.h
Source file repositories/reference/linux-study-clean/include/linux/scx200.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/scx200.h- Extension
.h- Size
- 1863 bytes
- Lines
- 53
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
Defines for the National Semiconductor SCx200 Processors
*/
/* Interesting stuff for the National Semiconductor SCx200 CPU */
extern unsigned scx200_cb_base;
#define scx200_cb_present() (scx200_cb_base!=0)
/* F0 PCI Header/Bridge Configuration Registers */
#define SCx200_DOCCS_BASE 0x78 /* DOCCS Base Address Register */
#define SCx200_DOCCS_CTRL 0x7c /* DOCCS Control Register */
/* GPIO Register Block */
#define SCx200_GPIO_SIZE 0x2c /* Size of GPIO register block */
/* General Configuration Block */
#define SCx200_CB_BASE_FIXED 0x9000 /* Base fixed at 0x9000 according to errata? */
/* Watchdog Timer */
#define SCx200_WDT_OFFSET 0x00 /* offset within configuration block */
#define SCx200_WDT_SIZE 0x05 /* size */
#define SCx200_WDT_WDTO 0x00 /* Time-Out Register */
#define SCx200_WDT_WDCNFG 0x02 /* Configuration Register */
#define SCx200_WDT_WDSTS 0x04 /* Status Register */
#define SCx200_WDT_WDSTS_WDOVF (1<<0) /* Overflow bit */
/* High Resolution Timer */
#define SCx200_TIMER_OFFSET 0x08
#define SCx200_TIMER_SIZE 0x06
/* Clock Generators */
#define SCx200_CLOCKGEN_OFFSET 0x10
#define SCx200_CLOCKGEN_SIZE 0x10
/* Pin Multiplexing and Miscellaneous Configuration Registers */
#define SCx200_MISC_OFFSET 0x30
#define SCx200_MISC_SIZE 0x10
#define SCx200_PMR 0x30 /* Pin Multiplexing Register */
#define SCx200_MCR 0x34 /* Miscellaneous Configuration Register */
#define SCx200_INTSEL 0x38 /* Interrupt Selection Register */
#define SCx200_IID 0x3c /* IA On a Chip Identification Number Reg */
#define SCx200_REV 0x3d /* Revision Register */
#define SCx200_CBA 0x3e /* Configuration Base Address Register */
#define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */
Annotation
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.