include/linux/sm501-regs.h
Source file repositories/reference/linux-study-clean/include/linux/sm501-regs.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/sm501-regs.h- Extension
.h- Size
- 11900 bytes
- Lines
- 386
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#define SM501_SYS_CONFIG (0x000000)
/* config 1 */
#define SM501_SYSTEM_CONTROL (0x000000)
#define SM501_SYSCTRL_PANEL_TRISTATE (1<<0)
#define SM501_SYSCTRL_MEM_TRISTATE (1<<1)
#define SM501_SYSCTRL_CRT_TRISTATE (1<<2)
#define SM501_SYSCTRL_PCI_SLAVE_BURST_MASK (3<<4)
#define SM501_SYSCTRL_PCI_SLAVE_BURST_1 (0<<4)
#define SM501_SYSCTRL_PCI_SLAVE_BURST_2 (1<<4)
#define SM501_SYSCTRL_PCI_SLAVE_BURST_4 (2<<4)
#define SM501_SYSCTRL_PCI_SLAVE_BURST_8 (3<<4)
#define SM501_SYSCTRL_PCI_CLOCK_RUN_EN (1<<6)
#define SM501_SYSCTRL_PCI_RETRY_DISABLE (1<<7)
#define SM501_SYSCTRL_PCI_SUBSYS_LOCK (1<<11)
#define SM501_SYSCTRL_PCI_BURST_READ_EN (1<<15)
#define SM501_SYSCTRL_2D_ENGINE_STATUS (1<<19)
/* miscellaneous control */
#define SM501_MISC_CONTROL (0x000004)
#define SM501_MISC_BUS_SH (0x0)
#define SM501_MISC_BUS_PCI (0x1)
#define SM501_MISC_BUS_XSCALE (0x2)
#define SM501_MISC_BUS_NEC (0x6)
#define SM501_MISC_BUS_MASK (0x7)
#define SM501_MISC_VR_62MB (1<<3)
#define SM501_MISC_CDR_RESET (1<<7)
#define SM501_MISC_USB_LB (1<<8)
#define SM501_MISC_USB_SLAVE (1<<9)
#define SM501_MISC_BL_1 (1<<10)
#define SM501_MISC_MC (1<<11)
#define SM501_MISC_DAC_POWER (1<<12)
#define SM501_MISC_IRQ_INVERT (1<<16)
#define SM501_MISC_SH (1<<17)
#define SM501_MISC_HOLD_EMPTY (0<<18)
#define SM501_MISC_HOLD_8 (1<<18)
#define SM501_MISC_HOLD_16 (2<<18)
#define SM501_MISC_HOLD_24 (3<<18)
#define SM501_MISC_HOLD_32 (4<<18)
#define SM501_MISC_HOLD_MASK (7<<18)
#define SM501_MISC_FREQ_12 (1<<24)
#define SM501_MISC_PNL_24BIT (1<<25)
#define SM501_MISC_8051_LE (1<<26)
#define SM501_GPIO31_0_CONTROL (0x000008)
#define SM501_GPIO63_32_CONTROL (0x00000C)
#define SM501_DRAM_CONTROL (0x000010)
/* command list */
#define SM501_ARBTRTN_CONTROL (0x000014)
/* command list */
#define SM501_COMMAND_LIST_STATUS (0x000024)
/* interrupt debug */
#define SM501_RAW_IRQ_STATUS (0x000028)
#define SM501_RAW_IRQ_CLEAR (0x000028)
#define SM501_IRQ_STATUS (0x00002C)
#define SM501_IRQ_MASK (0x000030)
#define SM501_DEBUG_CONTROL (0x000034)
/* power management */
#define SM501_POWERMODE_P2X_SRC (1<<29)
#define SM501_POWERMODE_V2X_SRC (1<<20)
#define SM501_POWERMODE_M_SRC (1<<12)
#define SM501_POWERMODE_M1_SRC (1<<4)
#define SM501_CURRENT_GATE (0x000038)
#define SM501_CURRENT_CLOCK (0x00003C)
#define SM501_POWER_MODE_0_GATE (0x000040)
#define SM501_POWER_MODE_0_CLOCK (0x000044)
#define SM501_POWER_MODE_1_GATE (0x000048)
#define SM501_POWER_MODE_1_CLOCK (0x00004C)
#define SM501_SLEEP_MODE_GATE (0x000050)
#define SM501_POWER_MODE_CONTROL (0x000054)
/* power gates for units within the 501 */
#define SM501_GATE_HOST (0)
#define SM501_GATE_MEMORY (1)
Annotation
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.