include/linux/soc/qcom/llcc-qcom.h

Source file repositories/reference/linux-study-clean/include/linux/soc/qcom/llcc-qcom.h

File Facts

System
Linux kernel
Corpus path
include/linux/soc/qcom/llcc-qcom.h
Extension
.h
Size
6419 bytes
Lines
251
Domain
Core OS
Bucket
Core Kernel Interface
Inferred role
Core OS: implementation source
Status
source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

Dependency Surface

Detected Declarations

Annotated Snippet

struct llcc_slice_desc {
	u32 slice_id;
	u32 uid;
	size_t slice_size;
	refcount_t refcount;
};

/**
 * struct llcc_edac_reg_data - LLCC EDAC registers data for each error type
 * @name: Name of the error
 * @reg_cnt: Number of registers
 * @count_mask: Mask value to get the error count
 * @ways_mask: Mask value to get the error ways
 * @count_shift: Shift value to get the error count
 * @ways_shift: Shift value to get the error ways
 */
struct llcc_edac_reg_data {
	char *name;
	u32 reg_cnt;
	u32 count_mask;
	u32 ways_mask;
	u8  count_shift;
	u8  ways_shift;
};

struct llcc_edac_reg_offset {
	/* LLCC TRP registers */
	u32 trp_ecc_error_status0;
	u32 trp_ecc_error_status1;
	u32 trp_ecc_sb_err_syn0;
	u32 trp_ecc_db_err_syn0;
	u32 trp_ecc_error_cntr_clear;
	u32 trp_interrupt_0_status;
	u32 trp_interrupt_0_clear;
	u32 trp_interrupt_0_enable;

	/* LLCC Common registers */
	u32 cmn_status0;
	u32 cmn_interrupt_0_enable;
	u32 cmn_interrupt_2_enable;

	/* LLCC DRP registers */
	u32 drp_ecc_error_cfg;
	u32 drp_ecc_error_cntr_clear;
	u32 drp_interrupt_status;
	u32 drp_interrupt_clear;
	u32 drp_interrupt_enable;
	u32 drp_ecc_error_status0;
	u32 drp_ecc_error_status1;
	u32 drp_ecc_sb_err_syn0;
	u32 drp_ecc_db_err_syn0;
};

/**
 * struct llcc_drv_data - Data associated with the LLCC driver
 * @dev: device back-pointer for this LLCC instance
 * @regmaps: regmaps associated with the LLCC device
 * @bcast_regmap: regmap associated with LLCC broadcast OR offset
 * @bcast_and_regmap: regmap associated with LLCC broadcast AND offset
 * @cfg: pointer to the data structure for slice configuration
 * @edac_reg_offset: Offset of the LLCC EDAC registers
 * @lock: mutex associated with each slice
 * @cfg_size: size of the config data table
 * @num_banks: Number of LLCC banks
 * @ecc_irq: interrupt for LLCC cache error detection and reporting
 * @ecc_irq_configured: 'True' if firmware has already configured the irq propagation
 * @version: Indicates the LLCC version
 * @desc: Array pointer of pre-allocated LLCC slice descriptors
 */
struct llcc_drv_data {
	struct device *dev;
	struct regmap **regmaps;
	struct regmap *bcast_regmap;
	struct regmap *bcast_and_regmap;
	const struct llcc_slice_config *cfg;
	const struct llcc_edac_reg_offset *edac_reg_offset;
	struct mutex lock;
	u32 cfg_size;
	u32 num_banks;
	int ecc_irq;
	bool ecc_irq_configured;
	u32 version;
	struct llcc_slice_desc *desc;
};

#if IS_ENABLED(CONFIG_QCOM_LLCC)
/**
 * llcc_slice_getd - get LLCC slice descriptor
 * @uid: usecase_id of the client
 */

Annotation

Implementation Notes