include/linux/ssb/ssb_driver_chipcommon.h
Source file repositories/reference/linux-study-clean/include/linux/ssb/ssb_driver_chipcommon.h
File Facts
- System
- Linux kernel
- Corpus path
include/linux/ssb/ssb_driver_chipcommon.h- Extension
.h- Size
- 29953 bytes
- Lines
- 673
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct ssb_devicestruct ssb_serial_portstruct ssb_chipcommon_pmustruct ssb_chipcommonenum ssb_clkmodeenum ssb_pmu_ldo_volt_idfunction ssb_chipco_available
Annotated Snippet
struct ssb_chipcommon_pmu {
u8 rev; /* PMU revision */
u32 crystalfreq; /* The active crystal frequency (in kHz) */
};
struct ssb_chipcommon {
struct ssb_device *dev;
u32 capabilities;
u32 status;
/* Fast Powerup Delay constant */
u16 fast_pwrup_delay;
spinlock_t gpio_lock;
struct ssb_chipcommon_pmu pmu;
u32 ticks_per_ms;
u32 max_timer_ms;
};
static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
{
return (cc->dev != NULL);
}
/* Register access */
#define chipco_read32(cc, offset) ssb_read32((cc)->dev, offset)
#define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val)
#define chipco_mask32(cc, offset, mask) \
chipco_write32(cc, offset, chipco_read32(cc, offset) & (mask))
#define chipco_set32(cc, offset, set) \
chipco_write32(cc, offset, chipco_read32(cc, offset) | (set))
#define chipco_maskset32(cc, offset, mask, set) \
chipco_write32(cc, offset, (chipco_read32(cc, offset) & (mask)) | (set))
extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc);
extern void ssb_chipco_resume(struct ssb_chipcommon *cc);
extern void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
unsigned long ns_per_cycle);
enum ssb_clkmode {
SSB_CLKMODE_SLOW,
SSB_CLKMODE_FAST,
SSB_CLKMODE_DYNAMIC,
};
extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
enum ssb_clkmode mode);
extern u32 ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks);
void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_irq_status(struct ssb_chipcommon *cc, u32 mask);
/* Chipcommon GPIO pin access. */
u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_pullup(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_pulldown(struct ssb_chipcommon *cc, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
struct ssb_serial_port *ports);
#endif /* CONFIG_SSB_SERIAL */
/* PMU support */
extern void ssb_pmu_init(struct ssb_chipcommon *cc);
enum ssb_pmu_ldo_volt_id {
LDO_PAREF = 0,
LDO_VOLT1,
LDO_VOLT2,
LDO_VOLT3,
};
void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
enum ssb_pmu_ldo_volt_id id, u32 voltage);
void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);
void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid);
Annotation
- Detected declarations: `struct ssb_device`, `struct ssb_serial_port`, `struct ssb_chipcommon_pmu`, `struct ssb_chipcommon`, `enum ssb_clkmode`, `enum ssb_pmu_ldo_volt_id`, `function ssb_chipco_available`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.