include/soc/fsl/qe/ucc_slow.h

Source file repositories/reference/linux-study-clean/include/soc/fsl/qe/ucc_slow.h

File Facts

System
Linux kernel
Corpus path
include/soc/fsl/qe/ucc_slow.h
Extension
.h
Size
8913 bytes
Lines
273
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ucc_slow_info {
	int ucc_num;
	int protocol;			/* QE_CR_PROTOCOL_xxx */
	enum qe_clock rx_clock;
	enum qe_clock tx_clock;
	phys_addr_t regs;
	int irq;
	u16 uccm_mask;
	int data_mem_part;
	int init_tx;
	int init_rx;
	u32 tx_bd_ring_len;
	u32 rx_bd_ring_len;
	int rx_interrupts;
	int brkpt_support;
	int grant_support;
	int tsa;
	int cdp;
	int cds;
	int ctsp;
	int ctss;
	int rinv;
	int tinv;
	int rtsm;
	int rfw;
	int tci;
	int tend;
	int tfl;
	int txsy;
	u16 max_rx_buf_length;
	enum ucc_slow_transparent_tcrc tcrc;
	enum ucc_slow_channel_protocol_mode mode;
	enum ucc_slow_diag_mode diag;
	enum ucc_slow_tx_oversampling_rate tdcr;
	enum ucc_slow_rx_oversampling_rate rdcr;
	enum ucc_slow_tx_encoding_method tenc;
	enum ucc_slow_rx_decoding_method renc;
};

struct ucc_slow_private {
	struct ucc_slow_info *us_info;
	struct ucc_slow __iomem *us_regs; /* Ptr to memory map of UCC regs */
	struct ucc_slow_pram __iomem *us_pram;	/* a pointer to the parameter RAM */
	s32 us_pram_offset;
	int enabled_tx;		/* Whether channel is enabled for Tx (ENT) */
	int enabled_rx;		/* Whether channel is enabled for Rx (ENR) */
	int stopped_tx;		/* Whether channel has been stopped for Tx
				   (STOP_TX, etc.) */
	int stopped_rx;		/* Whether channel has been stopped for Rx */
	struct list_head confQ;	/* frames passed to chip waiting for tx */
	u32 first_tx_bd_mask;	/* mask is used in Tx routine to save status
				   and length for first BD in a frame */
	s32 tx_base_offset;	/* first BD in Tx BD table offset (In MURAM) */
	s32 rx_base_offset;	/* first BD in Rx BD table offset (In MURAM) */
	struct qe_bd __iomem *confBd;	/* next BD for confirm after Tx */
	struct qe_bd __iomem *tx_bd;	/* next BD for new Tx request */
	struct qe_bd __iomem *rx_bd;	/* next BD to collect after Rx */
	void *p_rx_frame;	/* accumulating receive frame */
	__be16 __iomem *p_ucce;	/* a pointer to the event register in memory */
	__be16 __iomem *p_uccm;	/* a pointer to the mask register in memory */
	u16 saved_uccm;		/* a saved mask for the RX Interrupt bits */
#ifdef STATISTICS
	u32 tx_frames;		/* Transmitted frames counters */
	u32 rx_frames;		/* Received frames counters (only frames
				   passed to application) */
	u32 rx_discarded;	/* Discarded frames counters (frames that
				   were discarded by the driver due to
				   errors) */
#endif				/* STATISTICS */
};

/* ucc_slow_init
 * Initializes Slow UCC according to provided parameters.
 *
 * us_info  - (In) pointer to the slow UCC info structure.
 * uccs_ret - (Out) pointer to the slow UCC structure.
 */
int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret);

/* ucc_slow_free
 * Frees all resources for slow UCC.
 *
 * uccs - (In) pointer to the slow UCC structure.
 */
void ucc_slow_free(struct ucc_slow_private * uccs);

/* ucc_slow_enable
 * Enables a fast UCC port.
 * This routine enables Tx and/or Rx through the General UCC Mode Register.
 *

Annotation

Implementation Notes