include/soc/mscc/ocelot_hsio.h
Source file repositories/reference/linux-study-clean/include/soc/mscc/ocelot_hsio.h
File Facts
- System
- Linux kernel
- Corpus path
include/soc/mscc/ocelot_hsio.h- Extension
.h- Size
- 56321 bytes
- Lines
- 860
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _MSCC_OCELOT_HSIO_H_
#define _MSCC_OCELOT_HSIO_H_
#define HSIO_PLL5G_CFG0 0x0000
#define HSIO_PLL5G_CFG1 0x0004
#define HSIO_PLL5G_CFG2 0x0008
#define HSIO_PLL5G_CFG3 0x000c
#define HSIO_PLL5G_CFG4 0x0010
#define HSIO_PLL5G_CFG5 0x0014
#define HSIO_PLL5G_CFG6 0x0018
#define HSIO_PLL5G_STATUS0 0x001c
#define HSIO_PLL5G_STATUS1 0x0020
#define HSIO_PLL5G_BIST_CFG0 0x0024
#define HSIO_PLL5G_BIST_CFG1 0x0028
#define HSIO_PLL5G_BIST_CFG2 0x002c
#define HSIO_PLL5G_BIST_STAT0 0x0030
#define HSIO_PLL5G_BIST_STAT1 0x0034
#define HSIO_RCOMP_CFG0 0x0038
#define HSIO_RCOMP_STATUS 0x003c
#define HSIO_SYNC_ETH_CFG 0x0040
#define HSIO_SYNC_ETH_PLL_CFG 0x0048
#define HSIO_S1G_DES_CFG 0x004c
#define HSIO_S1G_IB_CFG 0x0050
#define HSIO_S1G_OB_CFG 0x0054
#define HSIO_S1G_SER_CFG 0x0058
#define HSIO_S1G_COMMON_CFG 0x005c
#define HSIO_S1G_PLL_CFG 0x0060
#define HSIO_S1G_PLL_STATUS 0x0064
#define HSIO_S1G_DFT_CFG0 0x0068
#define HSIO_S1G_DFT_CFG1 0x006c
#define HSIO_S1G_DFT_CFG2 0x0070
#define HSIO_S1G_TP_CFG 0x0074
#define HSIO_S1G_RC_PLL_BIST_CFG 0x0078
#define HSIO_S1G_MISC_CFG 0x007c
#define HSIO_S1G_DFT_STATUS 0x0080
#define HSIO_S1G_MISC_STATUS 0x0084
#define HSIO_MCB_S1G_ADDR_CFG 0x0088
#define HSIO_S6G_DIG_CFG 0x008c
#define HSIO_S6G_DFT_CFG0 0x0090
#define HSIO_S6G_DFT_CFG1 0x0094
#define HSIO_S6G_DFT_CFG2 0x0098
#define HSIO_S6G_TP_CFG0 0x009c
#define HSIO_S6G_TP_CFG1 0x00a0
#define HSIO_S6G_RC_PLL_BIST_CFG 0x00a4
#define HSIO_S6G_MISC_CFG 0x00a8
#define HSIO_S6G_OB_ANEG_CFG 0x00ac
#define HSIO_S6G_DFT_STATUS 0x00b0
#define HSIO_S6G_ERR_CNT 0x00b4
#define HSIO_S6G_MISC_STATUS 0x00b8
#define HSIO_S6G_DES_CFG 0x00bc
#define HSIO_S6G_IB_CFG 0x00c0
#define HSIO_S6G_IB_CFG1 0x00c4
#define HSIO_S6G_IB_CFG2 0x00c8
#define HSIO_S6G_IB_CFG3 0x00cc
#define HSIO_S6G_IB_CFG4 0x00d0
#define HSIO_S6G_IB_CFG5 0x00d4
#define HSIO_S6G_OB_CFG 0x00d8
#define HSIO_S6G_OB_CFG1 0x00dc
#define HSIO_S6G_SER_CFG 0x00e0
#define HSIO_S6G_COMMON_CFG 0x00e4
#define HSIO_S6G_PLL_CFG 0x00e8
#define HSIO_S6G_ACJTAG_CFG 0x00ec
#define HSIO_S6G_GP_CFG 0x00f0
#define HSIO_S6G_IB_STATUS0 0x00f4
#define HSIO_S6G_IB_STATUS1 0x00f8
#define HSIO_S6G_ACJTAG_STATUS 0x00fc
#define HSIO_S6G_PLL_STATUS 0x0100
#define HSIO_S6G_REVID 0x0104
#define HSIO_MCB_S6G_ADDR_CFG 0x0108
#define HSIO_HW_CFG 0x010c
#define HSIO_HW_QSGMII_CFG 0x0110
#define HSIO_HW_QSGMII_STAT 0x0114
#define HSIO_CLK_CFG 0x0118
#define HSIO_TEMP_SENSOR_CTRL 0x011c
#define HSIO_TEMP_SENSOR_CFG 0x0120
#define HSIO_TEMP_SENSOR_STAT 0x0124
#define HSIO_PLL5G_CFG0_ENA_ROT BIT(31)
#define HSIO_PLL5G_CFG0_ENA_LANE BIT(30)
#define HSIO_PLL5G_CFG0_ENA_CLKTREE BIT(29)
#define HSIO_PLL5G_CFG0_DIV4 BIT(28)
#define HSIO_PLL5G_CFG0_ENA_LOCK_FINE BIT(27)
#define HSIO_PLL5G_CFG0_SELBGV820(x) (((x) << 23) & GENMASK(26, 23))
#define HSIO_PLL5G_CFG0_SELBGV820_M GENMASK(26, 23)
#define HSIO_PLL5G_CFG0_SELBGV820_X(x) (((x) & GENMASK(26, 23)) >> 23)
#define HSIO_PLL5G_CFG0_LOOP_BW_RES(x) (((x) << 18) & GENMASK(22, 18))
#define HSIO_PLL5G_CFG0_LOOP_BW_RES_M GENMASK(22, 18)
#define HSIO_PLL5G_CFG0_LOOP_BW_RES_X(x) (((x) & GENMASK(22, 18)) >> 18)
#define HSIO_PLL5G_CFG0_SELCPI(x) (((x) << 16) & GENMASK(17, 16))
#define HSIO_PLL5G_CFG0_SELCPI_M GENMASK(17, 16)
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.