include/soc/mscc/ocelot_qsys.h
Source file repositories/reference/linux-study-clean/include/soc/mscc/ocelot_qsys.h
File Facts
- System
- Linux kernel
- Corpus path
include/soc/mscc/ocelot_qsys.h- Extension
.h- Size
- 14609 bytes
- Lines
- 255
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _MSCC_OCELOT_QSYS_H_
#define _MSCC_OCELOT_QSYS_H_
#define QSYS_PORT_MODE_RSZ 0x4
#define QSYS_PORT_MODE_DEQUEUE_DIS BIT(1)
#define QSYS_PORT_MODE_DEQUEUE_LATE BIT(0)
#define QSYS_STAT_CNT_CFG_TX_GREEN_CNT_MODE BIT(5)
#define QSYS_STAT_CNT_CFG_TX_YELLOW_CNT_MODE BIT(4)
#define QSYS_STAT_CNT_CFG_DROP_GREEN_CNT_MODE BIT(3)
#define QSYS_STAT_CNT_CFG_DROP_YELLOW_CNT_MODE BIT(2)
#define QSYS_STAT_CNT_CFG_DROP_COUNT_ONCE BIT(1)
#define QSYS_STAT_CNT_CFG_DROP_COUNT_EGRESS BIT(0)
#define QSYS_EEE_CFG_RSZ 0x4
#define QSYS_EEE_THRES_EEE_HIGH_BYTES(x) (((x) << 8) & GENMASK(15, 8))
#define QSYS_EEE_THRES_EEE_HIGH_BYTES_M GENMASK(15, 8)
#define QSYS_EEE_THRES_EEE_HIGH_BYTES_X(x) (((x) & GENMASK(15, 8)) >> 8)
#define QSYS_EEE_THRES_EEE_HIGH_FRAMES(x) ((x) & GENMASK(7, 0))
#define QSYS_EEE_THRES_EEE_HIGH_FRAMES_M GENMASK(7, 0)
#define QSYS_SW_STATUS_RSZ 0x4
#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT(x) (((x) << 8) & GENMASK(12, 8))
#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_M GENMASK(12, 8)
#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_X(x) (((x) & GENMASK(12, 8)) >> 8)
#define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK(x) ((x) & GENMASK(7, 0))
#define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M GENMASK(7, 0)
#define QSYS_QMAP_GSZ 0x4
#define QSYS_QMAP_SE_BASE(x) (((x) << 5) & GENMASK(12, 5))
#define QSYS_QMAP_SE_BASE_M GENMASK(12, 5)
#define QSYS_QMAP_SE_BASE_X(x) (((x) & GENMASK(12, 5)) >> 5)
#define QSYS_QMAP_SE_IDX_SEL(x) (((x) << 2) & GENMASK(4, 2))
#define QSYS_QMAP_SE_IDX_SEL_M GENMASK(4, 2)
#define QSYS_QMAP_SE_IDX_SEL_X(x) (((x) & GENMASK(4, 2)) >> 2)
#define QSYS_QMAP_SE_INP_SEL(x) ((x) & GENMASK(1, 0))
#define QSYS_QMAP_SE_INP_SEL_M GENMASK(1, 0)
#define QSYS_ISDX_SGRP_GSZ 0x4
#define QSYS_TIMED_FRAME_ENTRY_GSZ 0x4
#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT(x) (((x) << 9) & GENMASK(18, 9))
#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_M GENMASK(18, 9)
#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_X(x) (((x) & GENMASK(18, 9)) >> 9)
#define QSYS_TFRM_MISC_TIMED_CANCEL_1SHOT BIT(8)
#define QSYS_TFRM_MISC_TIMED_SLOT_MODE_MC BIT(7)
#define QSYS_TFRM_MISC_TIMED_ENTRY_FAST_CNT(x) ((x) & GENMASK(6, 0))
#define QSYS_TFRM_MISC_TIMED_ENTRY_FAST_CNT_M GENMASK(6, 0)
#define QSYS_RED_PROFILE_RSZ 0x4
#define QSYS_RED_PROFILE_WM_RED_LOW(x) (((x) << 8) & GENMASK(15, 8))
#define QSYS_RED_PROFILE_WM_RED_LOW_M GENMASK(15, 8)
#define QSYS_RED_PROFILE_WM_RED_LOW_X(x) (((x) & GENMASK(15, 8)) >> 8)
#define QSYS_RED_PROFILE_WM_RED_HIGH(x) ((x) & GENMASK(7, 0))
#define QSYS_RED_PROFILE_WM_RED_HIGH_M GENMASK(7, 0)
#define QSYS_RES_CFG_GSZ 0x8
#define QSYS_RES_STAT_GSZ 0x8
#define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT(x) ((x) & GENMASK(15, 0))
#define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT_M GENMASK(15, 0)
#define QSYS_EVENTS_CORE_EV_FDC(x) (((x) << 2) & GENMASK(4, 2))
#define QSYS_EVENTS_CORE_EV_FDC_M GENMASK(4, 2)
#define QSYS_EVENTS_CORE_EV_FDC_X(x) (((x) & GENMASK(4, 2)) >> 2)
#define QSYS_EVENTS_CORE_EV_FRD(x) ((x) & GENMASK(1, 0))
#define QSYS_EVENTS_CORE_EV_FRD_M GENMASK(1, 0)
#define QSYS_QMAXSDU_CFG_0_RSZ 0x4
#define QSYS_QMAXSDU_CFG_1_RSZ 0x4
#define QSYS_QMAXSDU_CFG_2_RSZ 0x4
#define QSYS_QMAXSDU_CFG_3_RSZ 0x4
#define QSYS_QMAXSDU_CFG_4_RSZ 0x4
#define QSYS_QMAXSDU_CFG_5_RSZ 0x4
#define QSYS_QMAXSDU_CFG_6_RSZ 0x4
#define QSYS_QMAXSDU_CFG_7_RSZ 0x4
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.