include/sound/acp63_chip_offset_byte.h

Source file repositories/reference/linux-study-clean/include/sound/acp63_chip_offset_byte.h

File Facts

System: Linux kernel
Corpus path: include/sound/acp63_chip_offset_byte.h
Extension: .h
Size: 30462 bytes
Lines: 496
Domain: Driver Families
Bucket: include/sound
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _acp_ip_OFFSET_HEADER
#define _acp_ip_OFFSET_HEADER

/* Registers from ACP_DMA block */
#define ACP_DMA_CNTL_0                                0x0000000
#define ACP_DMA_CNTL_1                                0x0000004
#define ACP_DMA_CNTL_2                                0x0000008
#define ACP_DMA_CNTL_3                                0x000000C
#define ACP_DMA_CNTL_4                                0x0000010
#define ACP_DMA_CNTL_5                                0x0000014
#define ACP_DMA_CNTL_6                                0x0000018
#define ACP_DMA_CNTL_7                                0x000001C
#define ACP_DMA_DSCR_STRT_IDX_0                       0x0000020
#define ACP_DMA_DSCR_STRT_IDX_1                       0x0000024
#define ACP_DMA_DSCR_STRT_IDX_2                       0x0000028
#define ACP_DMA_DSCR_STRT_IDX_3                       0x000002C
#define ACP_DMA_DSCR_STRT_IDX_4                       0x0000030
#define ACP_DMA_DSCR_STRT_IDX_5                       0x0000034
#define ACP_DMA_DSCR_STRT_IDX_6                       0x0000038
#define ACP_DMA_DSCR_STRT_IDX_7                       0x000003C
#define ACP_DMA_DSCR_CNT_0                            0x0000040
#define ACP_DMA_DSCR_CNT_1                            0x0000044
#define ACP_DMA_DSCR_CNT_2                            0x0000048
#define ACP_DMA_DSCR_CNT_3                            0x000004C
#define ACP_DMA_DSCR_CNT_4                            0x0000050
#define ACP_DMA_DSCR_CNT_5                            0x0000054
#define ACP_DMA_DSCR_CNT_6                            0x0000058
#define ACP_DMA_DSCR_CNT_7                            0x000005C
#define ACP_DMA_PRIO_0                                0x0000060
#define ACP_DMA_PRIO_1                                0x0000064
#define ACP_DMA_PRIO_2                                0x0000068
#define ACP_DMA_PRIO_3                                0x000006C
#define ACP_DMA_PRIO_4                                0x0000070
#define ACP_DMA_PRIO_5                                0x0000074
#define ACP_DMA_PRIO_6                                0x0000078
#define ACP_DMA_PRIO_7                                0x000007C
#define ACP_DMA_CUR_DSCR_0                            0x0000080
#define ACP_DMA_CUR_DSCR_1                            0x0000084
#define ACP_DMA_CUR_DSCR_2                            0x0000088
#define ACP_DMA_CUR_DSCR_3                            0x000008C
#define ACP_DMA_CUR_DSCR_4                            0x0000090
#define ACP_DMA_CUR_DSCR_5                            0x0000094
#define ACP_DMA_CUR_DSCR_6                            0x0000098
#define ACP_DMA_CUR_DSCR_7                            0x000009C
#define ACP_DMA_CUR_TRANS_CNT_0                       0x00000A0
#define ACP_DMA_CUR_TRANS_CNT_1                       0x00000A4
#define ACP_DMA_CUR_TRANS_CNT_2                       0x00000A8
#define ACP_DMA_CUR_TRANS_CNT_3                       0x00000AC
#define ACP_DMA_CUR_TRANS_CNT_4                       0x00000B0
#define ACP_DMA_CUR_TRANS_CNT_5                       0x00000B4
#define ACP_DMA_CUR_TRANS_CNT_6                       0x00000B8
#define ACP_DMA_CUR_TRANS_CNT_7                       0x00000BC
#define ACP_DMA_ERR_STS_0                             0x00000C0
#define ACP_DMA_ERR_STS_1                             0x00000C4
#define ACP_DMA_ERR_STS_2                             0x00000C8
#define ACP_DMA_ERR_STS_3                             0x00000CC
#define ACP_DMA_ERR_STS_4                             0x00000D0
#define ACP_DMA_ERR_STS_5                             0x00000D4
#define ACP_DMA_ERR_STS_6                             0x00000D8
#define ACP_DMA_ERR_STS_7                             0x00000DC
#define ACP_DMA_DESC_BASE_ADDR                        0x00000E0
#define ACP_DMA_DESC_MAX_NUM_DSCR                     0x00000E4
#define ACP_DMA_CH_STS                                0x00000E8
#define ACP_DMA_CH_GROUP                              0x00000EC
#define ACP_DMA_CH_RST_STS                            0x00000F0

/* Registers from ACP_AXI2AXIATU block */
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1                0x0000C00
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1                0x0000C04
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2                0x0000C08
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2                0x0000C0C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3                0x0000C10
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3                0x0000C14
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4                0x0000C18
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4                0x0000C1C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5                0x0000C20
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5                0x0000C24
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6                0x0000C28
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6                0x0000C2C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7                0x0000C30
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7                0x0000C34
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8                0x0000C38
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8                0x0000C3C
#define ACPAXI2AXI_ATU_CTRL                           0x0000C40
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9                0x0000C44
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9                0x0000C48
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10               0x0000C4C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10               0x0000C50
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11               0x0000C54
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11               0x0000C58

Annotation

Atlas domain: Driver Families / include/sound.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.