include/sound/acp7x_chip_offset_byte.h
Source file repositories/reference/linux-study-clean/include/sound/acp7x_chip_offset_byte.h
File Facts
- System
- Linux kernel
- Corpus path
include/sound/acp7x_chip_offset_byte.h- Extension
.h- Size
- 123998 bytes
- Lines
- 2520
- Domain
- Driver Families
- Bucket
- include/sound
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _acp_ip_7x_chip_OFFSET_BYTE_H
#define _acp_ip_7x_chip_OFFSET_BYTE_H
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x000C00
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x000C04
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x000C08
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x000C0C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x000C10
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x000C14
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x000C18
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x000C1C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x000C20
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x000C24
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x000C28
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x000C2C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x000C30
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x000C34
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x000C38
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x000C3C
#define ACPAXI2AXI_ATU_CTRL 0x000C40
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9 0x000C44
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9 0x000C48
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10 0x000C4C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10 0x000C50
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11 0x000C54
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11 0x000C58
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_12 0x000C5C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_12 0x000C60
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_13 0x000C64
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_13 0x000C68
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_14 0x000C6C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_14 0x000C70
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_15 0x000C74
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_15 0x000C78
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_16 0x000C7C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_16 0x000C80
#define ACP_SOFT_RESET 0x001000
#define ACP_CONTROL 0x001004
#define ACP_STATUS 0x001008
#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x001010
#define ACP_ZSC_DSP_CTRL 0x001014
#define ACP_ZSC_STS 0x001018
#define ACP_PGFSM_CONTROL 0x001024
#define ACP_PGFSM_STATUS 0x001028
#define ACP_CLKMUX_SEL 0x00102C
#define ACP_SW_48MHz_CLK_SEL 0x001030
#define ACP_AUDIO_CLK_SEL 0x001038
#define ACP_PDM_CORE_CLK_SEL 0x00103C
#define ACP_PME_EN 0x001400
#define ACP_DEVICE_STATE 0x001404
#define SW_DEVICE_STATE 0x001430
#define ACP_PIN_CONFIG 0x001440
#define ACP_PAD_PULLUP_CTRL 0x001444
#define ACP_PAD_PULLDOWN_CTRL 0x001448
#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x00144C
#define ACP_PAD_SCHMEN_CTRL 0x001450
#define ACP_SW_PAD_KEEPER_EN 0x001454
#define ACP_SW_WAKE_EN 0x001458
#define ACP_I2S_WAKE_EN 0x00145C
#define ACP_ACLK_AUDIOCLK_CTRL 0x001464
#define ACP_PAD_DISABLE_OE_CTRL 0x001468
#define ACP_SW0_PME_STS 0x001474
#define ACP_SW1_PME_STS 0x001478
#define ACP_SW2_PME_STS 0x00147C
#define ACP_SW3_PME_STS 0x001480
#define ACP_I2S_PME_STS 0x001484
#define ACP_TDM_LOOPBACK_EN 0x001488
#define ACP_FUTURE_REG_ACLK_0 0x0018E0
#define ACP_FUTURE_REG_ACLK_1 0x0018E4
#define ACP_FUTURE_REG_ACLK_2 0x0018E8
#define ACP_FUTURE_REG_ACLK_3 0x0018EC
#define ACP_FUTURE_REG_ACLK_4 0x0018F0
#define ACP_AXI2DAGB_SEM_0 0x0018F4
#define ACP_EXTERNAL_INTR_ENB 0x001A00
#define ACP_EXTERNAL_INTR_CNTL 0x001A04
#define ACP_EXTERNAL_INTR_CNTL1 0x001A08
#define ACP_EXTERNAL_SW0_INTR_CNTL 0x001A0C
#define ACP_EXTERNAL_SW1_INTR_CNTL 0x001A10
#define ACP_EXTERNAL_SW2_INTR_CNTL 0x001A14
#define ACP_EXTERNAL_SW3_INTR_CNTL 0x001A18
#define ACP_EXTERNAL_INTR_STAT 0x001A1C
#define ACP_EXTERNAL_INTR_STAT1 0x001A20
#define ACP_EXTERNAL_SW0_INTR_STAT 0x001A24
#define ACP_EXTERNAL_SW1_INTR_STAT 0x001A28
#define ACP_EXTERNAL_SW2_INTR_STAT 0x001A2C
#define ACP_EXTERNAL_SW3_INTR_STAT 0x001A30
Annotation
- Atlas domain: Driver Families / include/sound.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.