include/uapi/drm/msm_drm.h

Source file repositories/reference/linux-study-clean/include/uapi/drm/msm_drm.h

File Facts

System
Linux kernel
Corpus path
include/uapi/drm/msm_drm.h
Extension
.h
Size
23190 bytes
Lines
578
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

struct drm_msm_timespec {
	__s64 tv_sec;          /* seconds */
	__s64 tv_nsec;         /* nanoseconds */
};

/* Below "RO" indicates a read-only param, "WO" indicates write-only, and
 * "RW" indicates a param that can be both read (GET_PARAM) and written
 * (SET_PARAM)
 */
#define MSM_PARAM_GPU_ID     0x01  /* RO */
#define MSM_PARAM_GMEM_SIZE  0x02  /* RO */
#define MSM_PARAM_CHIP_ID    0x03  /* RO */
#define MSM_PARAM_MAX_FREQ   0x04  /* RO */
#define MSM_PARAM_TIMESTAMP  0x05  /* RO */
#define MSM_PARAM_GMEM_BASE  0x06  /* RO */
#define MSM_PARAM_PRIORITIES 0x07  /* RO: The # of priority levels */
#define MSM_PARAM_PP_PGTABLE 0x08  /* RO: Deprecated, always returns zero */
#define MSM_PARAM_FAULTS     0x09  /* RO */
#define MSM_PARAM_SUSPENDS   0x0a  /* RO */
#define MSM_PARAM_SYSPROF    0x0b  /* WO: 1 preserves perfcntrs, 2 also disables suspend */
#define MSM_PARAM_COMM       0x0c  /* WO: override for task->comm */
#define MSM_PARAM_CMDLINE    0x0d  /* WO: override for task cmdline */
#define MSM_PARAM_VA_START   0x0e  /* RO: start of valid GPU iova range */
#define MSM_PARAM_VA_SIZE    0x0f  /* RO: size of valid GPU iova range (bytes) */
#define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */
#define MSM_PARAM_RAYTRACING 0x11 /* RO */
#define MSM_PARAM_UBWC_SWIZZLE 0x12 /* RO */
#define MSM_PARAM_MACROTILE_MODE 0x13 /* RO */
#define MSM_PARAM_UCHE_TRAP_BASE 0x14 /* RO */
/* PRR (Partially Resident Region) is required for sparse residency: */
#define MSM_PARAM_HAS_PRR    0x15  /* RO */
/* MSM_PARAM_EN_VM_BIND is set to 1 to enable VM_BIND ops.
 *
 * With VM_BIND enabled, userspace is required to allocate iova and use the
 * VM_BIND ops for map/unmap ioctls.  MSM_INFO_SET_IOVA and MSM_INFO_GET_IOVA
 * will be rejected.  (The latter does not have a sensible meaning when a BO
 * can have multiple and/or partial mappings.)
 *
 * With VM_BIND enabled, userspace does not include a submit_bo table in the
 * SUBMIT ioctl (this will be rejected), the resident set is determined by
 * the the VM_BIND ops.
 *
 * Enabling VM_BIND will fail on devices which do not have per-process pgtables.
 * And it is not allowed to disable VM_BIND once it has been enabled.
 *
 * Enabling VM_BIND should be done (attempted) prior to allocating any BOs or
 * submitqueues of type MSM_SUBMITQUEUE_VM_BIND.
 *
 * Relatedly, when VM_BIND mode is enabled, the kernel will not try to recover
 * from GPU faults or failed async VM_BIND ops, in particular because it is
 * difficult to communicate to userspace which op failed so that userspace
 * could rewind and try again.  When the VM is marked unusable, the SUBMIT
 * ioctl will throw -EPIPE.
 */
#define MSM_PARAM_EN_VM_BIND 0x16  /* WO, once */
#define MSM_PARAM_AQE	     0x17  /* RO */

/* For backwards compat.  The original support for preemption was based on
 * a single ring per priority level so # of priority levels equals the #
 * of rings.  With drm/scheduler providing additional levels of priority,
 * the number of priorities is greater than the # of rings.  The param is
 * renamed to better reflect this.
 */
#define MSM_PARAM_NR_RINGS   MSM_PARAM_PRIORITIES

struct drm_msm_param {
	__u32 pipe;           /* in, MSM_PIPE_x */
	__u32 param;          /* in, MSM_PARAM_x */
	__u64 value;          /* out (get_param) or in (set_param) */
	__u32 len;            /* zero for non-pointer params */
	__u32 pad;            /* must be zero */
};

/*
 * GEM buffers:
 */

#define MSM_BO_SCANOUT       0x00000001     /* scanout capable */
#define MSM_BO_GPU_READONLY  0x00000002
/* Private buffers do not need to be explicitly listed in the SUBMIT
 * ioctl, unless referenced by a drm_msm_gem_submit_cmd.  Private
 * buffers may NOT be imported/exported or used for scanout (or any
 * other situation where buffers can be indefinitely pinned, but
 * cases other than scanout are all kernel owned BOs which are not
 * visible to userspace).
 *
 * In exchange for those constraints, all private BOs associated with
 * a single context (drm_file) share a single dma_resv, and if there
 * has been no eviction since the last submit, there are no per-BO
 * bookeeping to do, significantly cutting the SUBMIT overhead.

Annotation

Implementation Notes