include/uapi/linux/rio_mport_cdev.h
Source file repositories/reference/linux-study-clean/include/uapi/linux/rio_mport_cdev.h
File Facts
- System
- Linux kernel
- Corpus path
include/uapi/linux/rio_mport_cdev.h- Extension
.h- Size
- 9330 bytes
- Lines
- 279
- Domain
- Core OS
- Bucket
- Core Kernel Interface
- Inferred role
- Core OS: implementation source
- Status
- source implementation candidate
Why This File Exists
Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/ioctl.hlinux/types.h
Detected Declarations
struct rio_mport_maint_iostruct rio_mport_propertiesstruct rio_doorbellstruct rio_doorbell_filterstruct rio_portwritestruct rio_pw_filterstruct rio_mmapstruct rio_dma_memstruct rio_eventstruct rio_transfer_iostruct rio_transactionstruct rio_async_tx_waitstruct rio_rdev_infoenum rio_transfer_syncenum rio_transfer_direnum rio_exchange
Annotated Snippet
struct rio_mport_maint_io {
__u16 rioid; /* destID of remote device */
__u8 hopcount; /* hopcount to remote device */
__u8 pad0[5];
__u32 offset; /* offset in register space */
__u32 length; /* length in bytes */
__u64 buffer; /* pointer to data buffer */
};
/*
* Definitions for RapidIO data transfers:
* - memory mapped (MAPPED)
* - packet generation from memory (TRANSFER)
*/
#define RIO_TRANSFER_MODE_MAPPED (1 << 0)
#define RIO_TRANSFER_MODE_TRANSFER (1 << 1)
#define RIO_CAP_DBL_SEND (1 << 2)
#define RIO_CAP_DBL_RECV (1 << 3)
#define RIO_CAP_PW_SEND (1 << 4)
#define RIO_CAP_PW_RECV (1 << 5)
#define RIO_CAP_MAP_OUTB (1 << 6)
#define RIO_CAP_MAP_INB (1 << 7)
struct rio_mport_properties {
__u16 hdid;
__u8 id; /* Physical port ID */
__u8 index;
__u32 flags;
__u32 sys_size; /* Default addressing size */
__u8 port_ok;
__u8 link_speed;
__u8 link_width;
__u8 pad0;
__u32 dma_max_sge;
__u32 dma_max_size;
__u32 dma_align;
__u32 transfer_mode; /* Default transfer mode */
__u32 cap_sys_size; /* Capable system sizes */
__u32 cap_addr_size; /* Capable addressing sizes */
__u32 cap_transfer_mode; /* Capable transfer modes */
__u32 cap_mport; /* Mport capabilities */
};
/*
* Definitions for RapidIO events;
* - incoming port-writes
* - incoming doorbells
*/
#define RIO_DOORBELL (1 << 0)
#define RIO_PORTWRITE (1 << 1)
struct rio_doorbell {
__u16 rioid;
__u16 payload;
};
struct rio_doorbell_filter {
__u16 rioid; /* Use RIO_INVALID_DESTID to match all ids */
__u16 low;
__u16 high;
__u16 pad0;
};
struct rio_portwrite {
__u32 payload[16];
};
struct rio_pw_filter {
__u32 mask;
__u32 low;
__u32 high;
__u32 pad0;
};
/* RapidIO base address for inbound requests set to value defined below
* indicates that no specific RIO-to-local address translation is requested
* and driver should use direct (one-to-one) address mapping.
*/
#define RIO_MAP_ANY_ADDR (__u64)(~((__u64) 0))
struct rio_mmap {
__u16 rioid;
__u16 pad0[3];
__u64 rio_addr;
__u64 length;
__u64 handle;
__u64 address;
};
Annotation
- Immediate include surface: `linux/ioctl.h`, `linux/types.h`.
- Detected declarations: `struct rio_mport_maint_io`, `struct rio_mport_properties`, `struct rio_doorbell`, `struct rio_doorbell_filter`, `struct rio_portwrite`, `struct rio_pw_filter`, `struct rio_mmap`, `struct rio_dma_mem`, `struct rio_event`, `struct rio_transfer_io`.
- Atlas domain: Core OS / Core Kernel Interface.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.