include/ufs/unipro.h

Source file repositories/reference/linux-study-clean/include/ufs/unipro.h

File Facts

System: Linux kernel
Corpus path: include/ufs/unipro.h
Extension: .h
Size: 13945 bytes
Lines: 470
Domain: Repository Root And Misc
Bucket: include
Inferred role: Repository Root And Misc: implementation source
Status: source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

enum ufs_tx_eq_preset
enum ufs_tx_hs_preshoot
enum ufs_tx_hs_deemphasis
enum ufs_eom_eye_mask
enum ufs_op_mode
enum ufs_pa_pwr_mode
enum ufs_hs_gear_rate
enum ufs_pwm_gear_tag
enum ufs_hs_gear_tag
enum ufs_lanes
enum ufs_unipro_ver

Annotated Snippet

#ifndef _UNIPRO_H_
#define _UNIPRO_H_

/*
 * M-TX Configuration Attributes
 */
#define TX_HIBERN8TIME_CAPABILITY		0x000F
#define TX_HS_DEEMPHASIS_SETTING_CAP		0x0012
#define TX_HS_PRESHOOT_SETTING_CAP		0x0015
#define TX_MODE					0x0021
#define TX_HSRATE_SERIES			0x0022
#define TX_HSGEAR				0x0023
#define TX_PWMGEAR				0x0024
#define TX_AMPLITUDE				0x0025
#define TX_HS_SLEWRATE				0x0026
#define TX_SYNC_SOURCE				0x0027
#define TX_HS_SYNC_LENGTH			0x0028
#define TX_HS_PREPARE_LENGTH			0x0029
#define TX_LS_PREPARE_LENGTH			0x002A
#define TX_HIBERN8_CONTROL			0x002B
#define TX_LCC_ENABLE				0x002C
#define TX_PWM_BURST_CLOSURE_EXTENSION		0x002D
#define TX_BYPASS_8B10B_ENABLE			0x002E
#define TX_DRIVER_POLARITY			0x002F
#define TX_HS_UNTERMINATED_LINE_DRIVE_ENABLE	0x0030
#define TX_LS_TERMINATED_LINE_DRIVE_ENABLE	0x0031
#define TX_LCC_SEQUENCER			0x0032
#define TX_MIN_ACTIVATETIME			0x0033
#define TX_PWM_G6_G7_SYNC_LENGTH		0x0034
#define TX_HS_DEEMPHASIS_SETTING		0x0037
#define TX_HS_PRESHOOT_SETTING			0x003B
#define TX_REFCLKFREQ				0x00EB
#define TX_CFGCLKFREQVAL			0x00EC
#define	CFGEXTRATTR				0x00F0
#define DITHERCTRL2				0x00F1

/*
 * M-RX Configuration Attributes
 */
#define RX_HS_G5_ADAPT_INITIAL_CAP		0x0074
#define RX_HS_G6_ADAPT_INITIAL_CAP		0x007B
#define RX_HS_G6_ADAPT_INITIAL_L0L1L2L3_CAP	0x007D
#define RX_HS_G1_SYNC_LENGTH_CAP		0x008B
#define RX_HS_G1_PREP_LENGTH_CAP		0x008C
#define RX_MIN_ACTIVATETIME_CAPABILITY		0x008F
#define RX_HIBERN8TIME_CAPABILITY		0x0092
#define RX_HS_G2_SYNC_LENGTH_CAP		0x0094
#define RX_HS_G3_SYNC_LENGTH_CAP		0x0095
#define RX_HS_G2_PREP_LENGTH_CAP		0x0096
#define RX_HS_G3_PREP_LENGTH_CAP		0x0097
#define RX_ADV_GRANULARITY_CAP			0x0098
#define RX_HIBERN8TIME_CAP			0x0092
#define RX_ADV_HIBERN8TIME_CAP			0x0099
#define RX_ADV_MIN_ACTIVATETIME_CAP		0x009A
#define RX_HS_G4_ADAPT_INITIAL_CAP		0x009F
#define RX_MODE					0x00A1
#define RX_HSRATE_SERIES			0x00A2
#define RX_HSGEAR				0x00A3
#define RX_PWMGEAR				0x00A4
#define RX_LS_TERMINATED_ENABLE			0x00A5
#define RX_HS_UNTERMINATED_ENABLE		0x00A6
#define RX_ENTER_HIBERN8			0x00A7
#define RX_BYPASS_8B10B_ENABLE			0x00A8
#define RX_TERMINATION_FORCE_ENABLE		0x00A9
#define RXCALCTRL				0x00B4
#define RXSQCTRL				0x00B5
#define CFGRXCDR8				0x00BA
#define CFGRXOVR8				0x00BD
#define CFGRXOVR6				0x00BF
#define RX_FOM					0x00C2
#define RXDIRECTCTRL2				0x00C7
#define CFGRXOVR4				0x00E9
#define RX_REFCLKFREQ				0x00EB
#define	RX_CFGCLKFREQVAL			0x00EC
#define CFGWIDEINLN				0x00F0
#define RX_EYEMON_CAP				0x00F1
#define RX_EYEMON_TIMING_MAX_STEPS_CAP		0x00F2
#define RX_EYEMON_TIMING_MAX_OFFSET_CAP		0x00F3
#define RX_EYEMON_VOLTAGE_MAX_STEPS_CAP		0x00F4
#define RX_EYEMON_VOLTAGE_MAX_OFFSET_CAP	0x00F5
#define RX_EYEMON_ENABLE			0x00F6
#define RX_EYEMON_TIMING_STEPS			0x00F7
#define RX_EYEMON_VOLTAGE_STEPS			0x00F8
#define RX_EYEMON_TARGET_TEST_COUNT		0x00F9
#define RX_EYEMON_TESTED_COUNT			0x00FA
#define RX_EYEMON_ERROR_COUNT			0x00FB
#define RX_EYEMON_START				0x00FC
#define RX_EYEMON_EXTENDED_ERROR_COUNT		0x00FD

#define ENARXDIRECTCFG4				0x00F2

Annotation

Detected declarations: `enum ufs_tx_eq_preset`, `enum ufs_tx_hs_preshoot`, `enum ufs_tx_hs_deemphasis`, `enum ufs_eom_eye_mask`, `enum ufs_op_mode`, `enum ufs_pa_pwr_mode`, `enum ufs_hs_gear_rate`, `enum ufs_pwm_gear_tag`, `enum ufs_hs_gear_tag`, `enum ufs_lanes`.
Atlas domain: Repository Root And Misc / include.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.