lib/crypto/arm/sha1.h

File Facts

System

Linux kernel

Corpus path

lib/crypto/arm/sha1.h

Extension

.h

Size

1303 bytes

Lines

46

Domain

Kernel Services

Bucket

lib

Inferred role

Kernel Services: implementation source

Status

source implementation candidate

Why This File Exists

Shared kernel service surface used by multiple subsystems, including helpers, cryptography, virtualization support, and async I/O infrastructure.

• Shared kernel service surface used by multiple subsystems, including helpers, cryptography, virtualization support, and async I/O infrastructure.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• asm/simd.h

Detected Declarations

• function sha1_blocks
• function sha1_mod_init_arch

Annotated Snippet

static_branch_likely(&have_neon) && likely(may_use_simd())) {
		scoped_ksimd() {
			if (static_branch_likely(&have_ce))
				sha1_ce_transform(state, data, nblocks);
			else
				sha1_transform_neon(state, data, nblocks);
		}
	} else {
		sha1_block_data_order(state, data, nblocks);
	}
}

#ifdef CONFIG_KERNEL_MODE_NEON
#define sha1_mod_init_arch sha1_mod_init_arch
static void sha1_mod_init_arch(void)
{
	if (elf_hwcap & HWCAP_NEON) {
		static_branch_enable(&have_neon);
		if (elf_hwcap2 & HWCAP2_SHA1)
			static_branch_enable(&have_ce);
	}
}
#endif /* CONFIG_KERNEL_MODE_NEON */

Annotation

• Immediate include surface: `asm/simd.h`.
• Detected declarations: `function sha1_blocks`, `function sha1_mod_init_arch`.
• Atlas domain: Kernel Services / lib.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.