net/netfilter/nft_set_pipapo_avx2.h

File Facts

System

Linux kernel

Corpus path

net/netfilter/nft_set_pipapo_avx2.h

Extension

.h

Size

578 bytes

Lines

17

Domain

Networking Core

Bucket

Sockets, Protocols, Packet Path, And Network Policy

Inferred role

Networking Core: implementation source

Status

source implementation candidate

Why This File Exists

Networking stack implementation surface: socket APIs, protocol dispatch, packet flow, routing, filtering, and network namespaces.

• Networking stack implementation surface: socket APIs, protocol dispatch, packet flow, routing, filtering, and network namespaces.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• asm/fpu/xstate.h

Detected Declarations

• struct nft_pipapo_match

Annotated Snippet

#ifndef _NFT_SET_PIPAPO_AVX2_H

#if defined(CONFIG_X86_64) && !defined(CONFIG_UML)
#include <asm/fpu/xstate.h>
#define NFT_PIPAPO_ALIGN	(XSAVE_YMM_SIZE / BITS_PER_BYTE)

struct nft_pipapo_match;
bool nft_pipapo_avx2_estimate(const struct nft_set_desc *desc, u32 features,
			      struct nft_set_estimate *est);
struct nft_pipapo_elem *pipapo_get_avx2(const struct nft_pipapo_match *m,
					const u8 *data, u8 genmask,
					u64 tstamp);
#endif /* defined(CONFIG_X86_64) && !defined(CONFIG_UML) */

#endif /* _NFT_SET_PIPAPO_AVX2_H */

Annotation

• Immediate include surface: `asm/fpu/xstate.h`.
• Detected declarations: `struct nft_pipapo_match`.
• Atlas domain: Networking Core / Sockets, Protocols, Packet Path, And Network Policy.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.