rust/zerocopy/benches/new_vec_zeroed.x86-64

File Facts

System

Linux kernel

Corpus path

rust/zerocopy/benches/new_vec_zeroed.x86-64

Extension

.x86-64

Size

767 bytes

Lines

41

Domain

Rust Kernel Layer

Bucket

Rust API Membrane

Inferred role

Rust Kernel Layer: Rust API Membrane

Status

atlas-only

Why This File Exists

Rust-side wrappers and abstractions around kernel C APIs, ownership contracts, allocation, synchronization, and module integration.

• Rust-side wrappers and abstractions around kernel C APIs, ownership contracts, allocation, synchronization, and module integration.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

bench_new_vec_zeroed:
	mov rax, rdi
	movabs rcx, 1537228672809129301
	cmp rsi, rcx
	ja .LBB5_5
	test rsi, rsi
	je .LBB5_2
	push r15
	push r14
	push rbx
	lea rcx, [rsi + rsi]
	lea rbx, [rcx + 2*rcx]
	mov r14, rax
	mov r15, rsi
	call qword ptr [rip + __rustc::__rust_no_alloc_shim_is_unstable_v2@GOTPCREL]
	mov esi, 2
	mov rdi, rbx
	call qword ptr [rip + __rustc::__rust_alloc_zeroed@GOTPCREL]
	mov rsi, r15
	mov rcx, rax
	mov rax, r14
	test rcx, rcx
	pop rbx
	pop r14
	pop r15
	je .LBB5_5
	mov qword ptr [rax], rsi
	mov qword ptr [rax + 8], rcx
	mov qword ptr [rax + 16], rsi
	ret
.LBB5_5:
	movabs rcx, -9223372036854775808
	mov qword ptr [rax], rcx
	ret
.LBB5_2:
	mov ecx, 2
	mov qword ptr [rax], rsi
	mov qword ptr [rax + 8], rcx
	mov qword ptr [rax + 16], rsi
	ret

Annotation

• Atlas domain: Rust Kernel Layer / Rust API Membrane.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.