rust/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64.mca

Source file repositories/reference/linux-study-clean/rust/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64.mca

File Facts

System: Linux kernel
Corpus path: rust/zerocopy/benches/try_ref_from_bytes_dynamic_padding.x86-64.mca
Extension: .mca
Size: 3421 bytes
Lines: 82
Domain: Rust Kernel Layer
Bucket: Rust API Membrane
Inferred role: Rust Kernel Layer: Rust API Membrane
Status: atlas-only

Why This File Exists

Rust-side wrappers and abstractions around kernel C APIs, ownership contracts, allocation, synchronization, and module integration.

Rust-side wrappers and abstractions around kernel C APIs, ownership contracts, allocation, synchronization, and module integration.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

Iterations:        100
Instructions:      2100
Total Cycles:      709
Total uOps:        2300

Dispatch Width:    4
uOps Per Cycle:    3.24
IPC:               2.96
Block RThroughput: 5.8


Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      1     0.33                        test	dil, 3
 1      1     1.00                        jne	.LBB5_4
 1      1     0.33                        movabs	rax, 9223372036854775804
 1      1     0.33                        and	rax, rsi
 1      1     0.33                        cmp	rax, 9
 1      1     1.00                        jb	.LBB5_4
 1      1     0.33                        add	rax, -9
 1      1     0.33                        movabs	rcx, -6148914691236517205
 2      4     1.00                        mul	rcx
 1      1     0.50                        shr	rdx
 1      1     0.50                        lea	rax, [rdx + 2*rdx]
 1      1     0.33                        or	rax, 3
 1      1     0.33                        add	rax, 9
 1      1     0.33                        cmp	rsi, rax
 1      1     1.00                        jne	.LBB5_4
 2      6     0.50    *                   cmp	word ptr [rdi], -16192
 1      1     1.00                        je	.LBB5_5
 1      0     0.25                        xor	edi, edi
 1      1     0.33                        mov	rdx, rsi
 1      1     0.33                        mov	rax, rdi
 1      1     1.00                  U     ret


Resources:
[0]   - SBDivider
[1]   - SBFPDivider
[2]   - SBPort0
[3]   - SBPort1
[4]   - SBPort4
[5]   - SBPort5
[6.0] - SBPort23
[6.1] - SBPort23


Resource pressure per iteration:
[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  
 -      -     6.98   6.99    -     7.03   0.50   0.50   

Resource pressure by instruction:
[0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
 -      -     0.48   0.51    -     0.01    -      -     test	dil, 3
 -      -      -      -      -     1.00    -      -     jne	.LBB5_4
 -      -     0.51   0.49    -      -      -      -     movabs	rax, 9223372036854775804
 -      -     0.01   0.99    -      -      -      -     and	rax, rsi
 -      -     0.51   0.49    -      -      -      -     cmp	rax, 9
 -      -      -      -      -     1.00    -      -     jb	.LBB5_4
 -      -     0.98    -      -     0.02    -      -     add	rax, -9
 -      -     0.98   0.02    -      -      -      -     movabs	rcx, -6148914691236517205
 -      -     1.00   1.00    -      -      -      -     mul	rcx
 -      -     0.99    -      -     0.01    -      -     shr	rdx

Annotation

Atlas domain: Rust Kernel Layer / Rust API Membrane.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.