scripts/dtc/dt-style-selftest/bad/yaml-cont-align.yaml

File Facts

System

Linux kernel

Corpus path

scripts/dtc/dt-style-selftest/bad/yaml-cont-align.yaml

Extension

.yaml

Size

584 bytes

Lines

31

Domain

Support Tooling And Documentation

Bucket

scripts

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/test-bad-cont-align.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Test fixture with mis-aligned multi-line property

maintainers:
  - Test User <test@example.com>

properties:
  compatible:
    const: example,test-cont-align
  reg:
    maxItems: 2

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    foo@1000 {
        compatible = "example,test-cont-align";
        reg = <0x1000 0x100>,
            <0x2000 0x100>;
    };

Annotation

• Atlas domain: Support Tooling And Documentation / scripts.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.