security/apparmor/include/capability.h

File Facts

System

Linux kernel

Corpus path

security/apparmor/include/capability.h

Extension

.h

Size

1161 bytes

Lines

49

Domain

Core OS

Bucket

Security And Isolation

Inferred role

Core OS: implementation source

Status

source implementation candidate

Why This File Exists

Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.

• Core operating-system implementation surface: boot, tasks, memory, VFS, syscall-facing interfaces, synchronization, credentials, and isolation.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/sched.h
• apparmorfs.h

Detected Declarations

• struct aa_label
• struct aa_caps
• function aa_free_cap_rules

Annotated Snippet

struct aa_caps {
	kernel_cap_t allow;
	kernel_cap_t audit;
	kernel_cap_t denied;
	kernel_cap_t quiet;
	kernel_cap_t kill;
	kernel_cap_t extended;
};

extern struct aa_sfs_entry aa_sfs_entry_caps[];

kernel_cap_t aa_profile_capget(struct aa_profile *profile);
int aa_capable(const struct cred *subj_cred, struct aa_label *label,
	       int cap, unsigned int opts);

static inline void aa_free_cap_rules(struct aa_caps *caps)
{
	/* NOP */
}

#endif /* __AA_CAPBILITY_H */

Annotation

• Immediate include surface: `linux/sched.h`, `apparmorfs.h`.
• Detected declarations: `struct aa_label`, `struct aa_caps`, `function aa_free_cap_rules`.
• Atlas domain: Core OS / Security And Isolation.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.