sound/firewire/digi00x/digi00x.h

Source file repositories/reference/linux-study-clean/sound/firewire/digi00x/digi00x.h

File Facts

System
Linux kernel
Corpus path
sound/firewire/digi00x/digi00x.h
Extension
.h
Size
4839 bytes
Lines
161
Domain
Driver Families
Bucket
sound/firewire
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct snd_dg00x {
	struct snd_card *card;
	struct fw_unit *unit;

	struct mutex mutex;
	spinlock_t lock;

	struct amdtp_stream tx_stream;
	struct fw_iso_resources tx_resources;

	struct amdtp_stream rx_stream;
	struct fw_iso_resources rx_resources;

	unsigned int substreams_counter;

	/* for uapi */
	int dev_lock_count;
	bool dev_lock_changed;
	wait_queue_head_t hwdep_wait;

	/* For asynchronous messages. */
	struct fw_address_handler async_handler;
	u32 msg;

	/* Console models have additional MIDI ports for control surface. */
	bool is_console;

	struct amdtp_domain domain;
};

#define DG00X_ADDR_BASE		0xffffe0000000ull

#define DG00X_OFFSET_STREAMING_STATE	0x0000
#define DG00X_OFFSET_STREAMING_SET	0x0004
/* unknown but address in host space	0x0008 */
/* For LSB of the address		0x000c */
/* unknown				0x0010 */
#define DG00X_OFFSET_MESSAGE_ADDR	0x0014
/* For LSB of the address		0x0018 */
/* unknown				0x001c */
/* unknown				0x0020 */
/* not used			0x0024--0x00ff */
#define DG00X_OFFSET_ISOC_CHANNELS	0x0100
/* unknown				0x0104 */
/* unknown				0x0108 */
/* unknown				0x010c */
#define DG00X_OFFSET_LOCAL_RATE		0x0110
#define DG00X_OFFSET_EXTERNAL_RATE	0x0114
#define DG00X_OFFSET_CLOCK_SOURCE	0x0118
#define DG00X_OFFSET_OPT_IFACE_MODE	0x011c
/* unknown				0x0120 */
/* Mixer control on/off			0x0124 */
/* unknown				0x0128 */
#define DG00X_OFFSET_DETECT_EXTERNAL	0x012c
/* unknown				0x0138 */
#define DG00X_OFFSET_MMC		0x0400

enum snd_dg00x_rate {
	SND_DG00X_RATE_44100 = 0,
	SND_DG00X_RATE_48000,
	SND_DG00X_RATE_88200,
	SND_DG00X_RATE_96000,
	SND_DG00X_RATE_COUNT,
};

enum snd_dg00x_clock {
	SND_DG00X_CLOCK_INTERNAL = 0,
	SND_DG00X_CLOCK_SPDIF,
	SND_DG00X_CLOCK_ADAT,
	SND_DG00X_CLOCK_WORD,
	SND_DG00X_CLOCK_COUNT,
};

enum snd_dg00x_optical_mode {
	SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
	SND_DG00X_OPT_IFACE_MODE_SPDIF,
	SND_DG00X_OPT_IFACE_MODE_COUNT,
};

#define DOT_MIDI_IN_PORTS	1
#define DOT_MIDI_OUT_PORTS	2

int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
		   enum amdtp_stream_direction dir);
int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
			     unsigned int pcm_channels);
void amdtp_dot_reset(struct amdtp_stream *s);
int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
				     struct snd_pcm_runtime *runtime);
void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,

Annotation

Implementation Notes